ZHCSJ46F December 2016 – December 2018 DRA74P , DRA75P
ADVANCE INFORMATION for pre-production products; subject to change without notice.
| NO. | PARAMETER | DESCRIPTION | MIN | MAX | UNIT |
|---|---|---|---|---|---|
| MII1 | td(TX_CLK-TXD) | Delay time, miin_txclk to transmit selected signals valid | 0 | 25 | ns |
| td(TX_CLK-TX_EN) |
Figure 5-76 GMAC Transmit Interface Timing MIIn Operation In Table 5-105 are presented the specific groupings of signals (IOSET) for use with GMAC MII signals.
| SIGNALS | IOSET5 | IOSET6 | ||
|---|---|---|---|---|
| BALL | MUX | BALL | MUX | |
| GMAC MII1 | ||||
| mii1_txd3 | C5 | 8 | ||
| mii1_txd2 | D6 | 8 | ||
| mii1_txd1 | B2 | 8 | ||
| mii1_txd0 | C4 | 8 | ||
| mii1_rxd3 | F5 | 8 | ||
| mii1_rxd2 | E4 | 8 | ||
| mii1_rxd1 | C1 | 8 | ||
| mii1_rxd0 | E6 | 8 | ||
| mii1_col | B4 | 8 | ||
| mii1_rxer | B3 | 8 | ||
| mii1_txer | A3 | 8 | ||
| mii1_txen | A4 | 8 | ||
| mii1_crs | B5 | 8 | ||
| mii1_rxclk | D5 | 8 | ||
| mii1_txclk | C3 | 8 | ||
| mii1_rxdv | C2 | 8 | ||
| GMAC MII0 | ||||
| mii0_txd3 | V5 | 3 | ||
| mii0_txd2 | V4 | 3 | ||
| mii0_txd1 | Y2 | 3 | ||
| mii0_txd0 | W2 | 3 | ||
| mii0_rxd3 | W9 | 3 | ||
| mii0_rxd2 | V9 | 3 | ||
| mii0_rxd1 | V6 | 3 | ||
| mii0_rxd0 | U6 | 3 | ||
| mii0_txclk | U5 | 3 | ||
| mii0_txer | U4 | 3 | ||
| mii0_rxer | U7 | 3 | ||
| mii0_rxdv | V2 | 3 | ||
| mii0_crs | V7 | 3 | ||
| mii0_col | V1 | 3 | ||
| mii0_rxclk | Y1 | 3 | ||
| mii0_txen | V3 | 3 | ||