ZHCSEC3F October 2015 – January 2025 DP83867CS , DP83867E , DP83867IS
PRODUCTION DATA
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
| BIT | BIT NAME | DEFAULT | DESCRIPTION |
|---|---|---|---|
| 15:11 | RESERVED | 0, RO | RESERVED |
| 10:8 | RESERVED | 0x2, RW | RESERVED |
| 7 | RESERVED | 0, RO | RESERVED |
| 6:4 | RESERVED | 0x2, RW | RESERVED |
| 3 | RESERVED | 0, RO | RESERVED |
| 2:0 | ENERGY_LOST_FLD_THR | 0x1, RW | Energy Lost Threshold for FLD Energy Lost Mode ENERGY_LOST_FLD_THR asserts if energy detector accumulator falls below this threshold. When using strap to enable FLD feature, this bit defaults to 0x2. Register write is needed to change the value to 0x1. Changing the field to other value is not advised. |