ZHCSTD7A December 2021 – November 2023 BQ79631-Q1
PRODUCTION DATA
AUX_IN_HI
| Address | 0x05B2 | |||||||
| Read Only | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
| Name | RESULT[7:0] | |||||||
| Reset | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| RESULT[7:0] = | The ADC measurement result of the high-byte of the AUX voltage
in 2s complement. These AUX_IN_HI/LO registers will only
report AUX voltage measurement if host configures
[AUX_IN_SEL4:0] to lock to a single AUX channel. When host reads this register, the device locks the AUX voltage low-byte from updating until the high-byte and low-byte registers are read. | |||||||
AUX_IN_LO
| Address | 0x05B3 | |||||||
| Read Only | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
| Name | RESULT[7:0] | |||||||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| RESULT[7:0] = | The ADC measurement result of the low-byte of the AUX IN voltage in 2s complement. These AUX_IN_HI/LO registers will only report AUX voltage measurement if host configures [AUX_IN_SEL4:0] to lock to a single AUX channel. | |||||||