ZHCSVT2A April 2022 – April 2024 BQ76922
PRODUCTION DATA
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| VBAT | Supply voltage | Voltage on BAT pin (normal operation) | 4.7 | 27.5 | V | |
| VBAT | Supply voltage(3) | Voltage on BAT pin (OTP programming) | 10 | 12 | V | |
| TOTP | OTP programming temperature(3) | –40 | 45 | °C | ||
| VPORA | Power-on reset | Rising threshold on BAT | 3 | 4 | V | |
| VPORA_HYS | Power-on reset hysteresis | Device shuts down when BAT < VPORA - VPORA_HYS | 225 | mV | ||
| VWAKEONLD | Wake on LD voltage | Rising edge on LD, with BAT already in valid range | 0.8 | 1.45 | 2.25 | V |
| VWAKEONTS2 | Wake on TS2 voltage | Falling edge on TS2, with BAT already in valid range. TS2 will be weakly driven with a 5 V level during shutdown. | 0.7 | 1.1 | V | |
| VIN | Input voltage range(3) | PACK, LD | 0 | 27.5 | V | |
| VIN | Input voltage range(3) | PCHG, PDSG | the maximum of VBAT–9 or VLD–9 | 27.5 | V | |
| VIN | Input voltage range(3) | REG1, RST_SHUT, ALERT, SCL, SDA, CFETOFF, DFETOFF, except when the pin is being used for general purpose ADC input or thermistor measurement. | 0 | 5.5 | V | |
| VIN | Input voltage range(3) | TS1, TS2, CFETOFF, DFETOFF, ALERT, when the pin is configured for general purpose ADC input or thermistor measurement. | 0 | VREG18 | V | |
| VIN | Input voltage range(5) | SRP, SRN, SRP-SRN (while measuring current) | –0.2 | 0.2 | V | |
| VIN | Input voltage range(3) | SRP, SRN (without measuring current) | –0.2 | 0.75 | V | |
| VIN | Input voltage range(3)(4) | VVC(0) | –0.2 | 0.5 | V | |
| VIN | Input voltage range(5) | VVC(x), 1 ≤ x ≤ 3 | maximum of VVC(x–1) – 0.2 or VSS–0.2 | minimum of VVC(x–1)+5.5 or VSS+27.5 | V | |
| VIN | Input voltage range | VVC(x), x ≥ 4 | maximum of VVC(x–1) – 0.2 or VSS + 2.0 | minimum of VVC(x–1) + 5.5 or VSS + 27.5 | V | |
| RC | External cell input resistance(3) (6) | 20 | 100 | ? | ||
| RC | External cell input capacitance(3) (6) | 0.1 | 0.22 | 1 | μF | |
| VO | Output voltage range | LD | 27.5 | V | ||
| VO | Output voltage range(5) | CHG, DSG, CP1 | 40 | V | ||
| TOPR | Operating temperature(5) | –40 | 85 | °C | ||
| VCELL(ACC) | Cell voltage measurement accuracy | 2 V < VVC(x) - VVC(x-1) < 5 V, TA = 25°C, 1 ≤ x ≤ 5(1)(2) | –5 | 5 | mV | |
| VCELL(ACC) | Cell voltage measurement accuracy(5) | 2 V < VVC(x) - VVC(x-1) < 5 V, TA = 0°C to 60°C, 1 ≤ x ≤ 5(1)(2) | –10 | 10 | mV | |
| VCELL(ACC) | Cell voltage measurement accuracy(5) | –0.2 V < VVC(x) - VVC(x-1) < 5.5 V, TA = -40°C to 85°C, 1 ≤ x ≤ 5(1)(2) | –15 | 15 | mV | |
| VSTACK(ACC) | Stack voltage (VC5 - VSS) measurement accuracy(5) | 0 V < VVC5 - VVSS ≤ 27.5 V, TA = -40°C to 85°C(1) | –0.5 | 0.5 | V | |
| VPACK(ACC) | PACK pin voltage measurement accuracy(5) | 0 V < VPACK - VVSS ≤ 27.5 V, TA = -40°C to 85°C(1) | –0.5 | 0.5 | V | |
| VLD(ACC) | LD pin voltage measurement accuracy(5) | 0 V < VLD - VVSS ≤ 27.5 V, TA = -40°C to 85°C(1) | –0.5 | 0.5 | V | |