一本精品中文字幕在线,欧美日韩啪啪啪一区二区,久久精品国产男同专区

ZHCSMY8B September 2020 – January 2022 BQ769142

PRODUCTION DATA

1 特性
2 應用
3 說明
4 Revision History
5 Device Comparison Table
6 Pin Configuration and Functions
7 Specifications
1. 7.1 Absolute Maximum Ratings
2. 7.2 ESD Ratings
3. 7.3 Recommended Operating Conditions
4. 7.4 Thermal Information BQ769142
5. 7.5 Supply Current
6. 7.6 Digital I/O
7. 7.7 LD Pin
8. 7.8 Precharge (PCHG) and Predischarge (PDSG) FET Drive
9. 7.9 FUSE Pin Functionality
10. 7.10 REG18 LDO
11. 7.11 REG0 Pre-regulator
12. 7.12 REG1 LDO
13. 7.13 REG2 LDO
14. 7.14 Voltage References
15. 7.15 Coulomb Counter
16. 7.16 Coulomb Counter Digital Filter (CC1)
17. 7.17 Current Measurement Digital Filter (CC2)
18. 7.18 Current Wake Detector
19. 7.19 Analog-to-Digital Converter
20. 7.20 Cell Balancing
21. 7.21 Cell Open Wire Detector
22. 7.22 Internal Temperature Sensor
23. 7.23 Thermistor Measurement
24. 7.24 Internal Oscillators
25. 7.25 High-side NFET Drivers
26. 7.26 Comparator-Based Protection Subsystem
27. 7.27 Timing Requirements - I2C Interface, 100kHz Mode
28. 7.28 Timing Requirements - I2C Interface, 400kHz Mode
29. 7.29 Timing Requirements - HDQ Interface
30. 7.30 Timing Requirements - SPI Interface
31. 7.31 Interface Timing Diagrams
32. 7.32 Typical Characteristics
8 Device Description
1. 8.1 Overview
2. 8.2 BQ769142 Device Versions
3. 8.3 Functional Block Diagram
4. 8.4 Diagnostics
9 Device Configuration
1. 9.1 Commands and Subcommands
2. 9.2 Configuration Using OTP or Registers
3. 9.3 Device Security
4. 9.4 Scratchpad Memory
10Measurement Subsystem
1. 10.1 Voltage Measurement
2. 10.2 General Purpose ADCIN Functionality
3. 10.3 Coulomb Counter and Digital Filters
4. 10.4 Synchronized Voltage and Current Measurement
5. 10.5 Internal Temperature Measurement
6. 10.6 Thermistor Temperature Measurement
7. 10.7 Factory Trim of Voltage ADC
8. 10.8 Voltage Calibration (ADC Measurements)
9. 10.9 Voltage Calibration (COV and CUV Protections)
10. 10.10 Current Calibration
11. 10.11 Temperature Calibration
11Primary and Secondary Protection Subsystems
1. 11.1 Protections Overview
2. 11.2 Primary Protections
3. 11.3 Secondary Protections
4. 11.4 High-Side NFET Drivers
5. 11.5 Protection FETs Configuration and Control
  1. 11.5.1 FET Configuration
  2. 11.5.2 PRECHARGE and PREDISCHARGE Modes
6. 11.6 Load Detect Functionality
12Device Hardware Features
1. 12.1 Voltage References
2. 12.2 ADC Multiplexer
3. 12.3 LDOs
  1. 12.3.1 Preregulator Control
  2. 12.3.2 REG1 and REG2 LDO Controls
4. 12.4 Standalone Versus Host Interface
5. 12.5 Multifunction Pin Controls
6. 12.6 RST_SHUT Pin Operation
7. 12.7 CFETOFF, DFETOFF, and BOTHOFF Pin Functionality
8. 12.8 ALERT Pin Operation
9. 12.9 DDSG and DCHG Pin Operation
10. 12.10 Fuse Drive
11. 12.11 Cell Open Wire
12. 12.12 Low Frequency Oscillator
13. 12.13 High Frequency Oscillator
13Device Functional Modes
1. 13.1 Overview
2. 13.2 NORMAL Mode
3. 13.3 SLEEP Mode
4. 13.4 DEEPSLEEP Mode
5. 13.5 SHUTDOWN Mode
6. 13.6 CONFIG_UPDATE Mode
14Serial Communications Interface
1. 14.1 Serial Communications Overview
2. 14.2 I2C Communications
3. 14.3 SPI Communications
  1. 14.3.1 SPI Protocol
4. 14.4 HDQ Communications
15Cell Balancing
1. 15.1 Cell Balancing Overview
16Application and Implementation
1. 16.1 Application Information
2. 16.2 Typical Applications
3. 16.3 Random Cell Connection Support
4. 16.4 Startup Timing
5. 16.5 FET Driver Turn-Off
6. 16.6 Unused Pins
17Power Supply Requirements
18Layout
1. 18.1 Layout Guidelines
2. 18.2 Layout Example
19Device and Documentation Support
1. 19.1 第三方產品免責聲明
2. 19.2 Documentation Support
3. 19.3 支持資源
4. 19.4 Trademarks
5. 19.5 Electrostatic Discharge Caution
6. 19.6 術語表
20Mechanical, Packaging, Orderable Information

封裝選項

機械數據 (封裝 | 引腳)

PFB|48
- MTQF019B

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

zhcsmy8b_oa

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

DESCRIPTION	PINS	MIN	MAX	UNIT
Supply voltage range	BAT	VSS–0.3	VSS+85	V
Input voltage range, V_IN	PACK, LD	VSS–0.3	VSS+85	V
Input voltage range, V_IN	PCHG, PDSG	the maximum of V_BAT-10 or V_LD-10	VSS+85	V
Input voltage range, V_IN	REGIN	the maximum of VSS–0.3 or V_BREG-5.5	the minimum of VSS+6 or V_BAT+0.3 or V_BREG+0.3	V
Input voltage range, V_IN	FUSE⁽²⁾	VSS–0.3	the minimum of VSS+20 or V_BAT+0.3	V
Input voltage range, V_IN	BREG	the maximum of VSS–0.3 or V_REGIN-0.3	V_REGIN+5.5	V
Input voltage range, V_IN	REG1, REG2	VSS–0.3	minimum of VSS+6 or V_REGIN+0.3	V
Input voltage range, V_IN	ALERT, SCL, SDA, HDQ, CFETOFF, DFETOFF, DCHG, DDSG, RST_SHUT ⁽³⁾	VSS–0.3	VSS+6	V
Input voltage range, V_IN	TS1, TS2, TS3, ALERT, CFETOFF, DFETOFF, HDQ, DCHG, DDSG (when used as thermistor or general purpose ADC input)	VSS–0.3	V_REG18 + 0.3	V
Input voltage range, V_IN	SRP, SRN	VSS–0.3	V_REG18 + 0.3	V
Input voltage range, V_IN	VC14	maximum of VSS-0.3 and VC13A–0.3	VSS+85	V
Input voltage range, V_IN	VC13A	maximum of VSS-0.3 and VC13B–0.3	VSS+85	V
Input voltage range, V_IN	VC13B	maximum of VSS-0.3 and VC12A–0.3	VSS+85	V
Input voltage range, V_IN	VC12A	maximum of VSS-0.3 and VC12B–0.3	VSS+85	V
Input voltage range, V_IN	VC12B	maximum of VSS-0.3 and VC11–0.3	VSS+85	V
Input voltage range, V_IN	VC11	maximum of VSS-0.3 and VC10–0.3	VSS+85	V
Input voltage range, V_IN	VC10	maximum of VSS-0.3 and VC9–0.3	VSS+85	V
Input voltage range, V_IN	VC9	maximum of VSS-0.3 and VC8–0.3	VSS+85	V
Input voltage range, V_IN	VC8	maximum of VSS-0.3 and VC7–0.3	VSS+85	V
Input voltage range, V_IN	VC7	maximum of VSS-0.3 and VC6–0.3	VSS+85	V
Input voltage range, V_IN	VC6	maximum of VSS-0.3 and VC5–0.3	VSS+85	V
Input voltage range, V_IN	VC5	maximum of VSS-0.3 and VC4–0.3	VSS+85	V
Input voltage range, V_IN	VC4	maximum of VSS-0.3 and VC3–0.3	VSS+85	V
Input voltage range, V_IN	VC3	maximum of VSS-0.3 and VC2–0.3	VSS+85	V
Input voltage range, V_IN	VC2	maximum of VSS-0.3 and VC1–0.3	VSS+85	V
Input voltage range, V_IN	VC1	maximum of VSS-0.3 and VC0–0.3	VSS+85	V
Input voltage range, V_IN	VC0	VSS–0.3	VSS+6	V
Output voltage range, V_O	CP1	V_BAT–0.3	the minimum of VSS+85 or V_BAT+15	V
Output voltage range, V_O	CHG	VSS–0.3	VSS+85	V
Output voltage range, V_O	DSG	VSS–0.3	VSS+85	V
Output voltage range, V_O	REG1, REG2, TS2 (for wakeup function), ALERT, CFETOFF, DFETOFF, HDQ, DCHG, DDSG, when configured to drive a digital output	VSS–0.3	VSS+6	V
Output voltage range, V_O	REG18	VSS–0.3	VSS+2	V
Maximum cell balancing current through a single cell	VC0 – VC14		100	mA
Maximum VSS current, I_SS			75	mA
Functional temperature, T_FUNC		–40	85	°C
Junction temperature, T_J		–55	150	°C
Storage temperature, T_STG		–55	150	°C

(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

(2) The current allowed to flow into the FUSE pin must be limited (such as by using external series resistance) to 2 mA or less.

(3) When the ALERT, HDQ, CFETOFF, DFETOFF, DCHG, or DDSG pins are selected for thermistor input or general purpose ADC–input, their voltage is limited to V_REG18 + 0.3 V. These pins can accept up to 6 V when configured for other uses, such as a digital input.