ZHCADT8A December 2023 – June 2024 TAA5212 , TAC5111 , TAC5112 , TAC5211 , TAC5212 , TAD5112 , TAD5212
3.3.1 默認模式（主 Fs - 較高速率）
圖 3-3 是該用例的方框圖，其中包含 PASI 和 SASI 映射。PASI 以 48 KHz 運行，SASI 以 16 KHz 運行。在該用例中，模擬 (MIC) 輸入以主 Fs 進行采樣，并通過 SRC 進行下采樣，以降低 SASI TX 的速率。PASI TX 也以 48KHz 提供。在 DAC 側，SASI RX 數據可以在 DAC 輸出（揚聲器）之前與 PASI RX 數據進行混頻。
圖 3-3 默認模式圖下文顯示了 PASI 和 SASI 的 Audio Precision APx555 配置。在該測試用例中，混頻器系數保持為默認值（滿量程），輸入電平會被調整為不超過允許的最大電平（例如 -6dBrG），而不是 0dBrG。
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PASI APx555： 發生器： 模擬輸出 (MIC)：1KHz 正弦波，-6dBrG (0dBrG = 2Vrms) 分析器： 輸入 1：PASI Tx 的數字音頻，其中 Fs = 48 KHz、32 位深度 輸入 2：DAC 輸出（揚聲器）的模擬輸入 SASI APx555： 發生器： 數字輸出：750Hz 正弦波，-6dBFS 分析器： 輸入 1：SASI?Tx 的數字音頻，其中 Fs = 16 KHz、TDM、32 位深度 |
##### PASI higher rate, default SRC Mode Testing ######
# Target Mode, TDM, 32-bit
# Primary and Secondary ASI, multiple of 48KHz Sampling
# GPIO2=Secondary FSYNC, GPIO1=Secondary BCLK, GPI1=Secondary DIN, GPO1=Secondary DOUT for 4x4
#
w a0 00 00 # Set page 0
w a0 01 01 # Software Reset
w a0 02 09 # Wake up with AVDD > 2v and all VDDIO level
w a0 0a 10 # GPIO1 as input
w a0 0b 10 # GPIO2 as input
w a0 0d 02 # GPI1 as input
w a0 0c 71 # GPO1 as Secondary DOUT
w a0 11 a2 # Enable PASI DIN and Set GPI2A as Secondary FSYNC and GPIO1 as Secondary BCLK
w a0 12 60 # Set GPI1A as Secondary DIN
w a0 18 00 # Enable both Primary and Secondary ASI as independent
w a0 34 40 # PASI BCLK is the input clock source
w a0 19 00 # 1 data input and 1 data output for PASI and SASI
w a0 1a 30 # PASI TDM, 32 bit format
w a0 1e 20 # PASI DOUT Ch1 on TDM slot 0
w a0 1f 21 # PASI DOUT Ch2 on TDM slot 1
w a0 28 20 # PASI DIN Ch1 on TDM slot 0
w a0 29 21 # PASI DIN Ch2 on TDM slot 1
w a0 00 03 # Set page 3
w a0 1a 30 # SASI TDM, 32 bit format
w a0 1e 20 # SASI DOUT Ch1 on TDM slot 0
w a0 1f 21 # SASI DOUT Ch2 on TDM slot 1
w a0 28 20 # SASI DIN Ch1 on TDM slot 0
w a0 29 21 # SASI DIN Ch2 on TDM slot 1
w a0 00 01 # Set page 1
w a0 17 00 # Default SR-Converter with auto-detect
w a0 18 00 # auto m:n ratio
w a0 2c 80 # Enable DAC ASI Mixer
w a0 00 00 # Set page 0
w a0 50 00 # ADC Ch1 diff input, 5KOhm, 2Vrms ac-coupled, audio band
w a0 55 00 # ADC Ch2 diff input, 5KOhm, 2Vrms ac-coupled, audio band
w a0 64 20 # Configure OUT1P/M as differential from DAC1
w a0 65 20 # Configure OUT1P LINEOUT 0dB audio band
w a0 66 20 # Configure OUT1M LINEOUT 0dB 2Vrms Differential
w a0 6b 20 # Configure OUT2P/M as differential from DAC2
w a0 6c 20 # Configure OUT2P LINEOUT 0dB audio band
w a0 6d 20 # Configure OUT2M LINEOUT 0dB 2Vrms Differential
w a0 76 cc # Enable Input and Output Ch1 and Ch2
w a0 78 e0 # Power up ADC, DAC and MICBIAS
