STDA017 November 2025 TPS7A33 , TPS7A4501-SP , TPS7A47 , TPS7A47-Q1 , TPS7A4701-EP , TPS7A52 , TPS7A52-Q1 , TPS7A53 , TPS7A53-Q1 , TPS7A53A-Q1 , TPS7A53B , TPS7A54 , TPS7A54-Q1 , TPS7A57 , TPS7A8300 , TPS7A83A , TPS7A84 , TPS7A84A , TPS7A85A , TPS7A90 , TPS7A91 , TPS7A92 , TPS7A94 , TPS7A96 , TPS7B7702-Q1 , TPS7H1111-SEP , TPS7H1111-SP
Measurements were captured of parallel TPS7A57 LDOs using ballast resistors [3]. Each LDO in parallel has small variations in PCB impedance which affect the total ballast resistance between the LDOs [1]. This variation in ballast resistance causes each LDO to provide slightly different current to the load [1], causing the output impedance of each LDO to vary slightly from one another (see Figure 3-1).
To reduce the influence of the unequal PCB impedances, the ballast resistor value was increased from 2.5mΩ to 50mΩ. The resulting noise spectra are shown in Figure 5-1.
If noise is a critical parameter that must be absolutely minimized, a better approach than increasing RB is to match the impedance of the PCB planes after each RB of the LDOs. If a voltage drop across the ballast resistors is not critical (such as when configuring the parallel LDOs as a constant current source [4]), then a potential simpler approach is to use a large enough RB (such as 50m?) to mitigate the effects of parasitic PCB impedance.