SPRZ536B September 2022 – July 2024 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4APE-Q1 , TDA4VH-Q1 , TDA4VP-Q1 , TDA4VPE-Q1
MCAN: Specification Update for dedicated Tx Buffers and Tx Queues configured with same Message ID
The erratum updates the descriptions in Section 3.5.2 Dedicated Tx Buffers and 3.5.4 Tx Queue of the M_CAN User’s Manual related to message transmission from multiple dedicated Tx Buffers configured with the same Message ID.
Workaround #1:
After writing the Tx messages with same Message ID to the Message RAM, request transmission of all these message concurrently by single write access to TXBAR. Make sure none of these messages have a pending Tx request before making the concurrent request.
Workaround #2:
Use the Tx FIFO instead of dedicated Tx Buffers (set bit MCAN_TXBC[30] TFQM = 0 to use Tx FIFO) for the transmission of several messages with the same Message ID in a specific order.