SPRZ536B September 2022 – July 2024 AM69 , AM69A , TDA4AH-Q1 , TDA4AP-Q1 , TDA4APE-Q1 , TDA4VH-Q1 , TDA4VP-Q1 , TDA4VPE-Q1
C71x: DMA Accesses to L1D SRAM May Stall Indefinitely in the Presence of CPU Traffic in Specific Conditions
DMA reads or writes to L1D SRAM may stall indefinitely. These transactions are required to sensitize this condition:
Note that transactions #1, #2 and #3 are to the same buffer/line, while #4 is to a different buffer/line. This can encounter a condition which causes the DMAs to stall indefinitely.
Avoid doing DMAs to buffers mapped to L1D SRAM.