SNAU279A July 2022 – September 2022
- Abstract
- Trademarks
- 1Introduction
- 2EVM Quick Start
- 3EVM Configuration
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4EVM
Schematics
- 4.1 Power Supply Schematic
- 4.2 Alternative Power Supply Schematic
- 4.3 Power Distribution Schematic
- 4.4 LMK5B33414 and Input Reference Inputs IN0 to IN1 Schematic
- 4.5 Clock Outputs OUT0 to OUT3 Schematic
- 4.6 Clock Outputs OUT4 to OUT9 Schematic
- 4.7 Clock Outputs OUT10 to OUT13 and Clock Inputs IN2 and IN3 Schematic
- 4.8 XO Schematic
- 4.9 Logic I/O Interfaces Schematic
- 4.10 USB2ANY Schematic
- 5EVM Bill of Materials
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6Appendix A - TICS Pro LMK5B33414 Software
- 6.1 Using the Start Page
- 6.2 Using the Status Page
- 6.3 Using the Input Page
- 6.4 Using APLL1, APLL2, and APLL3 Pages
- 6.5 Using the DPLL1, DPLL2, and DPLL3 Pages
- 6.6 Using the Validation Page
- 6.7 Using the GPIO Page
- 6.8 SYNC/SYSREF/1-PPS Page
- 6.9 Using the Outputs Page
- 6.10 EEPROM Page
- 6.11 Design Report Page
- 7Revision History
6.4.1 APLL DCO
To use the DCO shift controls on a given APLL, enter the DCO ppb step value into the DCO Step Size (ppb) box shown below. The entered step size will be used to calculate a numerator deviation and a 2s complement numerator deviation. To perform the shift, the increment or decrement button must be pressed. An increment will write the numerator deviation to the DPLLx_FREE_RUN control which will result in a positive frequency shift in the amount specified by the DCO Step Size (ppb). An decrement will write the 2s complement numerator deviation to the DPLLx_FREE_RUN control which will result in a negative frequency shift in the amount specified by the DCO Step Size (ppb).
The slew rate at which the adjustment will occur is set on the DPLLx_HOLD_SLEW_STEP control. Ensure the DPLLx_HOLD_SLEW_STEP is NOT equal to 0, otherwise the adjustment will not occur. The recommended DPLLx_HOLD_SLEW_STEP value is 63 (maximum value). A value of 63 will result in the fastest adjustment.
Figure 6-16 APLL DCO Controls.