SLVUAW9C September 2016 – February 2020 UCD90320
The configuration bits in Table 60 dictate how the device will respond to sequence timeouts. Whenever a sequencing timeout occurs, the associated status and log information will be updated.
| Bit(s) | Name | Description | |
|---|---|---|---|
| 7:4 | Reserved | ||
| 3:2 | Sequence-Off Timeout Action | This bits determine what action will be taken after a sequence-off timeout occurs: | |
| b’00 – | The device continues to wait indefinitely for the sequence-off dependencies to be met. | ||
| b’01 – | The device stops waiting for the sequence-off dependencies to be met and continues the process of disabling the rail. | ||
| b’10 – | (same as b’00 action) | ||
| b’11 – | (same as b’00 action) | ||
| 1:0 | Sequence-On Timeout Action | This bits determine what action occurs after a sequence-on timeout occurs: | |
| b’00 – | The device continues to waits indefinitely for the sequence-on dependencies to be met. | ||
| b’01 – | The device stops waiting for the sequence-on dependencies to be met and continues the process of enabling the rail. | ||
| b’10 – | The device resequences this rail and all fault shutdown slaves associated with this rail. | ||
| This operation is defined by the “Time between Resequences” byte and the “Max Resequences” field in the MISC_CONFIG command (see Section 2.5). | |||
| b’11 – | (same as b’00 action) | ||