9 Power Supply Recommendations

The UCC28781-Q1 controller is intended to control zero-voltage-switching flyback (ZVSF) converters in high-efficiency, high DC input voltage applications, and can work in universal AC input range (85 V_AC to 265 V_AC, 47 Hz to 63 Hz) applications as well. An external depletion-mode MOSFET, connected between the switch node of the converter and the SWS + P13 pins of this controller, is required to charge the VDD capacitor during start-up and to perform ZVS sensing during normal operation.

When the V_VDD reaches the UVLO turn-on threshold at 17 V, the VDD rail should be kept within the bias supply operating voltage range listed in the Recommended Operating Conditions table. To avoid the possibility that the device might stop switching, V_VDD must not be allowed to fall below the UVLO turn-off threshold at 10.6 V.

The rectifier on the output winding must be a synchronous-rectifier (SR) MOSFET in order to generate the negative magnetizing current necessary to achieve ZVS for high efficiency. The current rating of this SR MOSFET should be appropriate for the peak current flowing during the demagnetization interval at maximum loading. In addition to the output voltage plus reflected bulk voltage impressed across the SR during PWML on-time, consideration for additional voltage spikes from various transient conditions should be made. Sources of voltage spikes on the SR include: hard switching of the primary-side MOSFET and non-ZCS turn-off of the SR-MOSFET.

Regardless of the cause of each of these spike sources, it is important to ensure that the peak voltage across the SR does not exceed its maximum rating. This limitation can be accomplished in several ways:

• choose a MOSFET with a higher voltage rating
• add a snubber or voltage clamp across the SR, or
• investigate each cause and mitigate the associated spike separately

The simplest approach may be to include a TVS clamp across the rectifier.