ZHCSQE6 October 2023 UCC27332-Q1
PRODUCTION DATA
The UCC27332-Q1 deviceis a single-channel, high-speed, gate drivers capable of effectively driving MOSFET, and GaN power switches with 9-A source and 9-A sink (symmetrical drive) peak current. A strong source and sink capability boost immunity against a parasitic Miller turnon effect. The UCC27332-Q1 device can be directly connected to the gate driver transformer or line driver transformer as the inputs of UCC27332-Q1 can handle –5V. The driver has a good transient handling capability on its output due to reverse currents, as well as rail-to-rail drive capability and small propagation delay, typically 23 ns.
The input threshold of UCC27332-Q1 is compatible to TTL low-voltage logic, which is fixed and independent of VDD supply voltage. The driver can also work with CMOS based controllers as long as the threshold requirement is met. The 1-V typical hysteresis offers excellent noise immunity.
The driver has an EN pin with fixed TTL compatible threshold. EN is internally pulled up; pulling EN low disables the driver, while leaving EN open provides normal operation. The EN pin can be used as an additional input with similar performance as the IN pin.
| FEATURE | BENEFIT |
|---|---|
| –5 V IN and EN capability | Enhanced signal reliability and device robustness in noisy environments that experience ground bounce on the gate driver. |
| High source and sink current capability 9 A | High current capability helps drive large gate charge loads to minimize switching losses. |
| Low 25 ns (typ) propagation delay. | Extremely low pulse transmission distortion |
| Wide VDD operating range of 4.5 V to 18 V | Flexibility in system design |
|
EN can float |
Safe operation when the output of the controller ties to the EN pin in tristate |
| Strong sink current (9 A) and low pulldown impedance (0.4?) | High immunity to high dV/dt Miller turnon events |
| TTL compatible input threshold logic with wide hysteresis | Enhanced noise immunity, while retaining compatibility with microcontroller logic level input signals (3.3 V, 5 V) optimized for digital power |