9 Power Supply Recommendations

The recommended input supply voltage (V_DD) for the UCC23525 device is from 13V to 30V. The lower limit of the range of output bias-supply voltage (V_DD) is determined by the internal UVLO protection feature of the device. V_DD voltage should not fall below the UVLO threshold for normal operation, or else the gate-driver outputs can become clamped low for more than TBD μs by the UVLO protection feature. The higher limit of the V_DD range depends on the maximum gate voltage of the power device that is driven by the UCC23525 device, and should not exceed the recommended maximum V_DD of 30 V. A local bypass capacitor should be placed between the VDD and VSS pins, with a value of 220-nF to 10-μF for device biasing. TI recommends placing an additional 100-nF capacitor in parallel with the device biasing capacitor for high frequency filtering. Both capacitors should be positioned as close to the device as possible. Low-ESR, ceramic surface-mount capacitors are recommended.

If only a single, primary-side power supply is available in an application, isolated power can be generated for the secondary side with the help of a transformer driver such as Texas Instruments' SN6501 or SN6505A. For such applications, detailed power supply design and transformer selection recommendations are available in SN6501 Transformer Driver for Isolated Power Supplies data sheet and SN6505A Low-Noise 1-A Transformer Drivers for Isolated Power Supplies data sheet.