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ZHCSVQ7A December 2023 – April 2024 UCC23525

ADVANCE INFORMATION

請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。

機(jī)械數(shù)據(jù) (封裝 | 引腳)

DWY|6

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

8.2.2.3 Estimate Gate-Driver Power Loss

The total loss, P_G, in the gate-driver subsystem includes the power losses (P_GD) of the UCC23525 device and the power losses in the peripheral circuitry, such as the external gate-drive resistor.

The P_GD value is the key power loss which determines the thermal safety-related limits of the UCC23525 device, and it can be estimated by calculating losses from several components.

The first component is the static power loss, P_GDQ, which includes power dissipated in the input stage (P_{GDQ_IN}) as well as the quiescent power dissipated in the output stage (P_{GDQ_OUT}) when operating with a certain switching frequency under no load. P_{GDQ_IN} is determined by I_F and V_F and is given by Equation 6. The P_{GDQ_OUT} parameter is measured on the bench with no load connected to V_OUT pin at a given V_DD, switching frequency, and ambient temperature. In this example, V_DD is 15 V. The current on the power supply, with PWM switching at 10 kHz, is measured to be I_DD = 1.33 mA . Therefore, use Equation 7 to calculate P_{GDQ_OUT}.

Equation 6.

P_{{G D Q}_{I N}} = \frac{1}{2} \times V_{F} \times I_{F}

Equation 7.

P_{{G D Q}_{O U T}} = V_{D D} \times I_{D D}

The total quiescent power (without any load capacitance) dissipated in the gate driver is given by the sum of Equation 6 and Equation 7 as shown in Equation 8.

Equation 8.

P_{G D Q} = P_{G D Q_{I N}} + P_{{G D Q}_{O U T}} = 9 m W + 20 m W = 29 m W

The second component is the switching operation loss, P_GDSW, with a given load capacitance which the driver charges and discharges the load during each switching cycle. Use Equation 9 to calculate the total dynamic loss from load switching, P_GSW.

Equation 9.

P_{G S W} = V_{D D} \times Q_{G} \times f_{S W}

where

Q_G is the gate charge of the power transistor at V_DD.

So, for this example application the total dynamic loss from load switching is approximately 18 mW as calculated in Equation 10.

Equation 10.

P_{G S W} = 15 V \times 120 n C \times 10 k H z = 18 m W

Q_G represents the total gate charge of the power transistor switching 520 V at 50 A, and is subject to change with different testing conditions. The UCC23525 gate-driver loss on the output stage, P_GDO, is part of P_GSW. P_GDO is equal to P_GSW if the external gate-driver resistance and power-transistor internal resistance are 0 Ω, and all the gate driver-loss will be dissipated inside the UCC23525. If an external turn-on and turn-off resistance exists, the total loss is distributed between the gate driver pull-up/down resistance, external gate resistance, and power-transistor internal resistance. Importantly, the pull-up/down resistance is a linear and fixed resistance if the source/sink current is not saturated to 5A/5A, however, it will be non-linear if the source/sink current is saturated. Therefore, P_GDO is different in these two scenarios.

Case 1 - Linear Pull-Up/Down Resistor:

Equation 11.

P_{G D O} = \frac{P_{G S W}}{2} [\frac{R_{O H}}{R_{O H} + R_{G O N} + R_{{G F E T}_{i n t}}} + \frac{R_{O L}}{R_{O L} + R_{G O N} | | R_{G O F F} + R_{{G F E T}_{i n t}}}]

In this design example, all the predicted source and sink currents are less than 5 A and 5 A, therefore, use Equation 11 to estimate the UCC23525 gate-driver loss.

Equation 12.

P_{G D O} = \frac{18 m W}{2} [\frac{2.5 Ω}{2.5 Ω + 10 Ω + 0 Ω} + \frac{0.7 Ω}{0.7 Ω + 10 Ω | | 10 Ω + 0 Ω}]

Case 2 - Nonlinear Pull-Up/Down Resistor:

Equation 13.

P_{G D O} = f_{s w} \times [\int_{0}^{T_{R_{S y s}}} 5 A \times (V_{D D} - V_{O U T} (t)) d t + \int_{0}^{T_{R_{S y s}}} 5 A \times V_{O U T} (t) d t]

where

V_OUT(t) is the gate-driver OUT pin voltage during the turnon and turnoff period. In cases where the output is saturated for some time, this value can be simplified as a constant-current source (5 A at turnon and 5 A at turnoff) charging or discharging a load capacitor. Then, the V_OUT(t) waveform will be linear and the T_{R_Sys} and T_{F_Sys} can be easily predicted.

For some scenarios, if only one of the pullup or pulldown circuits is saturated and another one is not, the P_GDO is a combination of case 1 and case 2, and the equations can be easily identified for the pullup and pulldown based on this discussion.

Use Equation 14 to calculate the total gate-driver loss dissipated in the UCC23525 gate driver, P_GD.

Equation 14.

P_{G D} = P_{G D Q} + P_{G D O} = 29 m W + 2.9 m W = 31.9 m W