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ZHCSQF3B april 2022 – june 2023 TPSI2140-Q1

PRODUCTION DATA

封裝選項

機械數據 (封裝 | 引腳)

DWQ|11
- MPSS144A

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

6.9 Electrical Characteristics

Unless otherwise noted, all minimum/maximum specifications are over recommended operating conditions. All typical values are measured at T_J = 25C, V_VDD = 5V, V_EN= 5V.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
PRIMARY SIDE SUPPLY (VDD)
V_{UVLO_R}	VDD undervoltage threshold rising	VDD rising	4	4.2	4.4	V
V_{UVLO_F}	VDD undervoltage threshold falling	VDD falling	3.9	4.1	4.3	V
V_{UVLO_HYS}	VDD undervoltage threshold hysteresis		40	100	150	mV
I_{VDD_ON}	VDD current, device powered on	T_J = 25°C		9	11	mA
I_{VDD_ON}	VDD current, device powered on	–40°C ≤ T_J ≤ 150°C		9	12	mA
I_{VDD_OFF}	VDD current, 5 V, device powered off	V_VDD = 5 V, V_EN = 0 V, T_J = 25°C		3.5	8	μA
		V_VDD = 5 V, V_EN = 0 V, T_J = 105°C		4.5	11	μA
		V_VDD = 5 V, V_EN = 0 V, T_J = 125°C		5.2	16	μA
		V_VDD = 5 V, V_EN = 0 V, –40°C ≤ T_J ≤ 150°C			30	μA
	VDD current, 20 V, device powered off	V_VDD = 20 V, V_EN = 0 V, T_J = 25°C		8	10.5	μA
		V_VDD = 20 V, V_EN = 0 V, T_J = 105°C		10	17
		V_VDD = 20 V, V_EN = 0 V, T_J = 125°C		11	25
		V_VDD = 20 V, V_EN = 0 V, –40°C ≤ T_J ≤ 150°C			40
FET CHARACTERISTICS (S1, S2)
R_DSON	On resistance	I_O = 2 mA, T_J = 25°C		130	175	Ω
		I_O = 2 mA, T_J = 85°C		176	235
		I_O = 2 mA, T_J = 105°C		192	250
		I_O = 2 mA, T_J = 125°C		210	275
		I_O = 2 mA, –40°C ≤ T_J ≤ 150°C			300
I_OFF	Off leakage, 1200 V	V = +/–1200 V, T_J = 25°C		0.02	0.1	μA
		V = +/–1200 V, T_J = 85°C			0.5
		V = +/–1200 V, T_J = 105°C			1.5
		V = +/–1200 V, T_J = 125°C			6
		V = +/–1200 V, –40°C ≤ T_J ≤ 150°C			50
	Off leakage, 1000 V	V = +/–1000 V, T_J = 25°C		0.02	0.1	μA
		V = +/–1000 V, T_J = 85°C			0.3
		V = +/–1000 V, T_J = 105°C			1
		V = +/–1000 V, T_J = 125°C			4
		V = +/–1000 V, –40°C ≤ T_J ≤ 150°C			35
V_AVA	Avalanche voltage	I_O = 10 μA, T_J = 25°C	1300	1550		V
V_AVA	Avalanche voltage	I_O = 100 μA, T_J = 150°C	1300	1550		V
V_{SM_OFF}	SM voltage	V_S1 = 1000 V, V_S2 = 0 V OR V_S2 = 1000 V, V_S1 = 0 V	400		600	V
C_OSS	S1, S2 capacitance	V_S1,S2 = 0 V, SM float, F = 1 MHz		75		pF
LOGIC-LEVEL INPUT (EN)
V_IL	Input logic low voltage		0.0		0.8	V
V_IH	Input logic high voltage		2.1		20.0	V
V_HYS	Input logic hysteresis		100	250	300	mV
I_IL	Input logic low current	V_EN = 0 V	–0.1		0.1	μA
I_IL	Input logic low current	V_EN = 0.8 V	2	4	6.5	μA
I_IH	Input logic high current	V_EN = 5 V	10	22	50	μA
I_IH	Input logic high current	V_EN = 20 V	100	175	350	μA
I_{VDD_FS}	VDD fail-safe current	V_EN = 20 V, V_VDD = 0 V	–0.1		0.1	μA
R_PD	Pulldown resistance	Two point measurement, V_EN = 0.5 V and V_EN = 0.8 V	100	200	350	kΩ
NOISE IMMUNITY
CMTI	Common-mode transient immunity	\|V_CM\| = 1000 V			100.0	V/ns