ZHCSQF3B april 2022 – june 2023 TPSI2140-Q1
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| PRIMARY SIDE SUPPLY (VDD) | ||||||
| VUVLO_R | VDD undervoltage threshold rising | VDD rising | 4 | 4.2 | 4.4 | V |
| VUVLO_F | VDD undervoltage threshold falling | VDD falling | 3.9 | 4.1 | 4.3 | V |
| VUVLO_HYS | VDD undervoltage threshold hysteresis | 40 | 100 | 150 | mV | |
| IVDD_ON | VDD current, device powered on | TJ = 25°C | 9 | 11 | mA | |
| VDD current, device powered on | –40°C ≤ TJ ≤ 150°C | 9 | 12 | mA | ||
| IVDD_OFF | VDD current, 5 V, device powered off | VVDD = 5 V, VEN = 0 V, TJ = 25°C | 3.5 | 8 | μA | |
| VVDD = 5 V, VEN = 0 V, TJ = 105°C | 4.5 | 11 | μA | |||
| VVDD = 5 V, VEN = 0 V, TJ = 125°C | 5.2 | 16 | μA | |||
| VVDD = 5 V, VEN = 0 V, –40°C ≤ TJ ≤ 150°C | 30 | μA | ||||
| VDD current, 20 V, device powered off | VVDD = 20 V, VEN = 0 V, TJ = 25°C | 8 | 10.5 | μA | ||
| VVDD = 20 V, VEN = 0 V, TJ = 105°C | 10 | 17 | ||||
| VVDD = 20 V, VEN = 0 V, TJ = 125°C | 11 | 25 | ||||
| VVDD = 20 V, VEN = 0 V, –40°C ≤ TJ ≤ 150°C | 40 | |||||
| FET CHARACTERISTICS (S1, S2) | ||||||
| RDSON | On resistance | IO = 2 mA, TJ = 25°C | 130 | 175 | Ω | |
| IO = 2 mA, TJ = 85°C | 176 | 235 | ||||
| IO = 2 mA, TJ = 105°C | 192 | 250 | ||||
| IO = 2 mA, TJ = 125°C | 210 | 275 | ||||
| IO = 2 mA, –40°C ≤ TJ ≤ 150°C | 300 | |||||
| IOFF | Off leakage, 1200 V | V = +/–1200 V, TJ = 25°C | 0.02 | 0.1 | μA | |
| V = +/–1200 V, TJ = 85°C | 0.5 | |||||
| V = +/–1200 V, TJ = 105°C | 1.5 | |||||
| V = +/–1200 V, TJ = 125°C | 6 | |||||
| V = +/–1200 V, –40°C ≤ TJ ≤ 150°C | 50 | |||||
| Off leakage, 1000 V | V = +/–1000 V, TJ = 25°C | 0.02 | 0.1 | μA | ||
| V = +/–1000 V, TJ = 85°C | 0.3 | |||||
| V = +/–1000 V, TJ = 105°C | 1 | |||||
| V = +/–1000 V, TJ = 125°C | 4 | |||||
| V = +/–1000 V, –40°C ≤ TJ ≤ 150°C | 35 | |||||
| VAVA | Avalanche voltage | IO = 10 μA, TJ = 25°C | 1300 | 1550 | V | |
| IO = 100 μA, TJ = 150°C | 1300 | 1550 | ||||
| VSM_OFF | SM voltage | VS1 = 1000 V, VS2 = 0 V OR VS2 = 1000 V, VS1 = 0 V | 400 | 600 | V | |
| COSS | S1, S2 capacitance | VS1,S2 = 0 V, SM float, F = 1 MHz | 75 | pF | ||
| LOGIC-LEVEL INPUT (EN) | ||||||
| VIL | Input logic low voltage | 0.0 | 0.8 | V | ||
| VIH | Input logic high voltage | 2.1 | 20.0 | V | ||
| VHYS | Input logic hysteresis | 100 | 250 | 300 | mV | |
| IIL | Input logic low current | VEN = 0 V | –0.1 | 0.1 | μA | |
| IIL | Input logic low current | VEN = 0.8 V | 2 | 4 | 6.5 | μA |
| IIH | Input logic high current | VEN = 5 V | 10 | 22 | 50 | μA |
| IIH | Input logic high current | VEN = 20 V | 100 | 175 | 350 | μA |
| IVDD_FS | VDD fail-safe current | VEN = 20 V, VVDD = 0 V | –0.1 | 0.1 | μA | |
| RPD | Pulldown resistance | Two point measurement, VEN = 0.5 V and VEN = 0.8 V | 100 | 200 | 350 | kΩ |
| NOISE IMMUNITY | ||||||
| CMTI | Common-mode transient immunity | |VCM| = 1000 V | 100.0 | V/ns | ||