ZHCSIF5G December 2015 – July 2024 TPS99000-Q1
PRODUCTION DATA
There are two configurations for this chip, HUD and headlight. Table 7-1 shows the differences in the pin connections between the two configurations.
| PIN | NAME | DESCRIPTION | HUD | HEADLIGHT |
|---|---|---|---|---|
| 12 | COMPOUT | Photodiode (PD) Interface High-speed comparator output | Connect to DLPC23x-Q1 GPIO_02 | No connect |
| 15 | SYNC | External LED buck driver sync strobe output | See Section 7.2.1.2.3 | No connect |
| 18 | D_EN | LED Interface; Buck High-Side FET Drive Enable | Connect to DLPC23x-Q1 D_EN (GPIO_04) | Connect to DLPC23x-Q1 D_EN (GPIO_04) or ground |
| 19 | S_EN | LED Bypass Shunt Strobe Input | Connect to DLPC23x-Q1 S_EN (GPIO_03) | Connect to DLPC23x-Q1 S_EN (GPIO_03) or ground |
| 20 | LED_SEL_0 | LED Enable Strobe 0 Input | Connect to DLPC23x-Q1 PMIC_LEDSEL_0 | Connect to DLPC23x-Q1 PMIC_LEDSEL_0 or ground |
| 21 | LED_SEL_1 | LED Enable Strobe 1 Input | Connect to DLPC23x-Q1 PMIC_LEDSEL_1 | Connect to DLPC23x-Q1 PMIC_LEDSEL_1 or ground |
| 22 | LED_SEL_2 | LED Enable Strobe 2 Input | Connect to DLPC23x-Q1 PMIC_LEDSEL_2 | Ground |
| 23 | LED_SEL_3 | LED Enable Strobe 3 Input | Connect to DLPC23x-Q1 PMIC_LEDSEL_3 | Ground |
| 38 | DRV_EN | Drive enable for LM3409 | Driver select enable | Resistor to ground |
| 39 | CMODE | Capacitor selection output (allows for a smaller capacitance to be used in CM mode for less over/under shoot). Open drain | See Section 6.3.1.4.7 | No connect |
| 40 | DMUX0 | Digital test point output | Either connect to test point or leave unconnected. Do not ground. | Either connect to test point or leave unconnected. Do not ground. |
| 41 | DMUX1 | Digital test point output | Either connect to test point or leave unconnected. Do not ground. | Either connect to test point or leave unconnected. Do not ground. |
| 43 | S_EN1 | Low resistance shunt NFET drive enable [High means shunt active] | See Section 6.3.1.3.3 | Shunt enable / No connect |
| 44 | S_EN2 | High resistance shunt NFET drive enable [High means shunt active] | See Section 6.3.1.3.3 | No connect |
| 45 | R_EN | Red channel select. Drive for low side NFET | FET enable | FET enable / No connect |
| 46 | G_EN | Green channel select. Drive for low side NFET | FET enable | FET enable / No connect |
| 47 | B_EN | Blue channel select. Drive for low side NFET | FET enable | FET enable / No connect |
| 57 | AMUX1 | Analog Test Mux Output 1 | Either connect to test point or leave unconnected. Do not ground. | Either connect to test point or leave unconnected. Do not ground. |
| 61 | AMUX0 | Analog Test Mux Output 0 | Either connect to test point or leave unconnected. Do not ground. | Either connect to test point or leave unconnected. Do not ground. |
| 62 | VIN_LDOT_M8 | Dedicated TIA Interface –8V(nom) LDO external regulation FET drive signal for -8V regulator | Refer to Section 6.3.6 | Connect as described inSection 6.3.6 or do not connect (select NC option in SW). |
| 63 | VLDOT_M8 | Dedicated TIA Interface –8V (nom) LDO filtered supply (regulated voltage feedback) | Refer to Section 6.3.6 | Connect as described inSection 6.3.6 or do not connect (select NC option in SW). |
| 76 | R_IADJ | External resistance for IADJ voltage to current transformation | See Section 7.2.1.2.3 | Ground |
| 77 | IADJ | Current output used to adjust external LED controller drive current set point | See Section 7.2.1.2.3 | Ground |
| 85 | ADC_IN1 | External ADC Channel 1, see Table 6-2 | Connect to LED anode with voltage divider | No connect / Optional (customer use) |
| 86 | ADC_IN2 | External ADC Channel 2, see Table 6-2 | Optional (LED input voltage) | No connect / Optional (customer use) |
| 88 | ADC_IN3 | External ADC Channel 3, see Table 6-2 | No connect / Optional (customer use) | No connect / Optional (customer use) |
| 90 | ADC_IN4 | External ADC Channel 4, see Table 6-2 | No connect / Optional (customer use) | No connect / Optional (customer use) |
| 92 | ADC_IN5 | External ADC Channel 5, see Table 6-2 | No Connect / Optional (Thermistor) | No connect / Optional (customer use) |
| 93 | ADC_IN6 | External ADC Channel 6, see Table 6-2 | No Connect / Optional (Thermistor) | No connect / Optional (customer use) |
| 94 | ADC_IN7 | External ADC Channel 7, see Table 6-2 | No Connect / Optional (Thermistor) | No connect / Optional (customer use) |
Pulldown resistors are required on the pins in the below table to avoid a floating input during the power-up and power-down conditions.
| PIN | NAME | TYP |
|---|---|---|
| 5 | ADC_MOSI | 10 kΩ |
| 6 | WD1 | 10 kΩ |
| 16 | SEQ_START | 10 kΩ |
| 17 | SEQ_CLK | 10 kΩ |
| 18 | D_EN(1) | 10 kΩ |
| 19 | S_EN(1) | 10 kΩ |
| 20 | LED_SEL_0(1) | 10 kΩ |
| 21 | LED_SEL_1(1) | 10 kΩ |
| 22 | LED_SEL_2(1) | 10 kΩ |
| 23 | LED_SEL_3(1) | 10 kΩ |
| 27 | SPI1_CLK | 10 kΩ |
| 30 | SPI1_DIN | 10 kΩ |
| 31 | SPI2_DIN | 10 kΩ |
| 34 | SPI2_CLK | 10 kΩ |
| 49 | DMD_VOFFSET(2) | 56 kΩ |
| 50 | DMD_VBIAS(2) | 110 kΩ |
| 51 | DMD_VRESET(2) | 68 kΩ |