The DLPC23x-Q1 1 is a controller for the DMD and the light sources in headlight applications. It receives input video from the host and synchronizes DMD and light source timing in order to achieve the desired video. The DLPC23x-Q1 formats input video data that is displayed on the DMD. It synchronizes these video segments with light source timing in order to create video with grayscale shading.

The DLPC23x-Q1 receives inputs from a host processor in the vehicle. The host provides commands and input video data. R/W commands can be sent using either the I²C bus or SPI bus. The bus that is not being used for R/W commands can be used as a read-only bus for diagnostic purposes. Input video can be sent over an OpenLDI bus or a parallel 24-bit bus. The 24-bit bus can be limited to only 8-bits of data for single light source systems such as headlights. The SPI flash memory provides the embedded software for the DLPC23x-Q1’s ARM core, any calibration data, and default settings. The TPS99000-Q1 provides diagnostic and monitoring information to the DLPC23x-Q1 using an SPI bus and several other control signals such as PARKZ, INTZ, and RESETZ to manage power-up and power-down sequencing. The TMP411 uses an I²C interface to provide the DMD array temperature to the DLPC23x-Q1.

The outputs of the DLPC23x-Q1 are configuration and monitoring commands to the TPS99000-Q1, timing controls to the LED or laser driver, control signals to the DMD, and monitoring and diagnostics information to the host processor. The DLPC23x-Q1 communicates with the TPS99000-Q1 over an SPI bus. It uses this to configure the TPS99000-Q1 and to read monitoring and diagnostics information from the TPS99000-Q1. The DLPC23x-Q1 sends drive-enable signals to the LED or laser driver, and synchronizes this with the DMD mirror timing. The control signals to the DMD are sent using a SubLVDS interface.

The TPS99000-Q1 is a highly integrated mixed-signal IC that controls DMD power, the timing and amplitude of the LEDs or lasers, and provides monitoring and diagnostics information for the headlight system. The power sequencing and monitoring blocks of the TPS99000-Q1 properly power up the DMD and provide accurate DMD voltage rails, and then monitor the system’s power rails during operation. The integration of these functions into one IC significantly reduces design time and complexity. The TPS99000-Q1 also has several output signals that can be used to control a variety of LED or laser driver topologies. The TPS99000-Q1 also has several general-purpose ADCs that designers can use for system-level monitoring, such as over-brightness detection.

The TPS99000-Q1 receives inputs from the DLPC23x-Q1, the power rails it monitors, the host processor, and potentially several other ADC ports. The DLPC23x-Q1 sends configuration and control commands to the TPS99000-Q1 over an SPI bus and several other control signals. The TPS99000-Q1 includes watchdogs to monitor the DLPC23x-Q1 and ensure that it is operating as expected. The power rails are monitored by the TPS99000-Q1 to detect power failures or glitches and request a proper power down of the DMD in case of an error. The host processor can read diagnostics information from the TPS99000-Q1 using a dedicated SPI bus. Additionally, the host can request the image to be turned on or off using a PROJ_ON signal. Lastly, the TPS99000-Q1 has several general-purpose ADCs that can be used to implement system-level monitoring functions.

The outputs of the TPS99000-Q1 are diagnostic information and error alerts to the DLPC23x-Q1, and control signals to the LED or laser driver. The TPS99000-Q1 can output diagnostic information to the host and the DLPC23x-Q1 over two SPI busses. In case of critical system errors, such as power loss, it outputs signals to the DLPC23x-Q1 that trigger power down or reset sequences. It also has output signals that can be used to implement various LED or laser driver topologies.

The DMD is a micro-electro-mechanical system (MEMS) device that receives electrical signals as an input (video data) and produces a mechanical output (mirror position). The electrical interface to the DMD is a SubLVDS interface with the DLPC23x-Q1. The mechanical output is the state of more than 1.3 million mirrors in the DMD array that can be tilted ±12°. In a projection system, the mirrors are used as pixels to display an image.