ZHCSIY0 October 2018 TPS92515AHV-Q1
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 General Operation
- 8.3.2 Current Sense Comparator
- 8.3.3 OFF Timer
- 8.3.4 OFF-Timer, Shunt FET Dimming or Shunted Output Condition
- 8.3.5 Internal N-channel MOSFET
- 8.3.6 VCC Internal Regulator and Undervoltage Lockout (UVLO)
- 8.3.7 Analog Adjust Input
- 8.3.8 Thermal Protection
- 8.3.9 Junction Temperature Relative Estimation
- 8.3.10 BOOT and BOOT UVLO
- 8.3.11 PWM (UVLO and Enable)
- 8.4 Device Functional Modes
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Application
- 9.2.1 General Design Procedure
- 9.2.2 Design Requirements
- 9.2.3
Detailed Design Procedure
- 9.2.3.1 Calculating Duty Cycle
- 9.2.3.2 Calculate OFF-Time Estimate
- 9.2.3.3 Calculate OFF-Time Resistor ROFF
- 9.2.3.4 Calculate the Inductance Value
- 9.2.3.5 Calculate the Sense Resistance
- 9.2.3.6 Calculate Input Capacitance
- 9.2.3.7 Verify Peak Current for Inductor Selection
- 9.2.3.8 Calculate Output Capacitance
- 9.2.3.9 Calculate UVLO Resistance Values
- 9.2.4 Application Curves
- 9.3 Dos and Don'ts
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械、封裝和可訂購信息
9.2.3.9 Calculate UVLO Resistance Values
Consider the rising threshold of VIN to be 29 V and the hysteresis to be 4 V, calculate R2 and R3 to create the desired operation:
Equation 33. 
Equation 34. 
The final schematic is shown in Figure 33 and performance curves in the Application Curves section:
Figure 33. Application Schematic