ZHCSL68C April 2017 – December 2020 TPS7A84A
PRODUCTION DATA
The TPS7A84A features a programmable, monotonic, voltage-controlled soft-start that is set with an external capacitor (CNR/SS).The use of an external CNR/SS is highly recommended, especially to minimize in-rush current into the output capacitors. This soft-start eliminates power-up initialization problems when powering field-programmable gate arrays (FPGAs), digital signal processors (DSPs), or other processors. The controlled voltage ramp of the output also reduces peak in-rush current during start-up, minimizing start-up transients to the input power bus.
To achieve a monotonic start-up, the TPS7A84A error amplifier tracks the voltage ramp of the external soft-start capacitor until the voltage approaches the internal reference. The soft-start ramp time depends on the soft-start charging current (INR/SS), the soft-start capacitance (CNR/SS), and the internal reference (VNR/SS). Soft-start ramp time can be calculated with Equation 6:
INR/SS is provided in the Electrical Characteristics: General table in the Section 6 section.
The noise-reduction capacitor, in conjunction with the noise-reduction resistor, forms a low-pass filter (LPF) that filters out the noise from the reference before being gained up with the error amplifier, thereby reducing the device noise floor. The LPF is a single-pole filter and the cutoff frequency can be calculated with Equation 7. The typical value of RNR/SS is 250 kΩ. Increasing the CNR/SS capacitor has a greater affect because the output voltage increases when the noise from the reference is gained up even more at higher output voltages. For low-noise applications, a 10-nF to 1-μF CNR/SS is recommended. Note that as a CNR/SS capacitor gets larger, the capacitor leakage will increase causing longer than expected start-up time.