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ZHCSHE2B September 2017 – June 2018 TPS7A52-Q1

PRODUCTION DATA.

封裝選項

機械數據 (封裝 | 引腳)

RGR|20
- MPQF239A
RTK|20
- MPQF160B

散熱焊盤機械數據 (封裝 | 引腳)

RGR|20
- QFND242E

訂購信息

6.6 Typical Characteristics

at T_A = 25°C, V_IN = 1.4 V or V_IN = V_OUT(NOM) + 0.4 V (whichever is greater), V_BIAS = open, V_OUT(NOM) = 0.8 V, V_EN = 1.1 V, C_OUT = 22 µF, C_NR/SS = 0 nF, C_FF = 0 nF, and PG pin pulled up to V_IN with 100 kΩ (unless otherwise noted)

TPS7A52-Q1 Fig1-PSRRvsFrequencyandIout.gif

V_IN = 1.1 V, V_BIAS = 5 V, C_NR/SS = 10 nF, C_FF = 10 nF

Figure 1. PSRR vs Frequency and I_OUT

TPS7A52-Q1 Fig3-PSRRvsFrequencyandVbias.gif

V_IN = 1.4 V, I_OUT = 1 A,
C_NR/SS = 10 nF, C_FF = 10 nF

Figure 3. PSRR vs Frequency and V_BIAS

TPS7A52-Q1 Fig5-PSRRvsFrequencyandVout=Vin_plus0.3V.gif

V_IN = V_OUT + 0.3 V, V_BIAS = 5.0 V, I_OUT = 2 A,
C_NR/SS = 10 nF, C_FF = 10 nF

Figure 5. PSRR vs Frequency and V_OUT With Bias

TPS7A52-Q1 Fig7-PSRRvsFrequencyandCout.gif

V_IN = V_OUT + 0.3 V, V_OUT = 1 V, I_OUT = 2 A,
C_NR/SS = 10 nF, C_FF = 10 nF

Figure 7. PSRR vs Frequency and C_OUT

TPS7A52-Q1 Fig9-OutputVoltageNoisevsOutputVoltage.gif

V_IN= V_OUT + 0.3 V and V_BIAS = 5 V for V_OUT ≤ 2.2 V,
C_NR/SS = 10 nF, C_FF = 10 nF,
RMS noise BW = 10 Hz to 100 kHz

Figure 9. Output Voltage Noise vs Output Voltage

TPS7A52-Q1 Fig11-OutputVoltageNoisevsFreqvsVin.gif

I_OUT = 2 A, C_NR/SS = 10 nF, C_FF = 10 nF,
RMS noise BW = 10 Hz to 100 kHz

Figure 11. Output Noise vs Frequency and V_IN

TPS7A52-Q1 Fig13-OutputVoltageNoisevsFreqvsCff.gif

V_IN= V_OUT + 0.3 V, V_BIAS = 5 V, I_OUT = 2 A, sequencing with a dc-dc converter and PG,
C_NR/SS = 10 nF, RMS noise BW = 10 Hz to 100 kHz

Figure 13. Output Noise vs Frequency and C_FF

V_IN = 1.2 V, V_OUT = 0.9 V, V_BIAS = 5.0 V, I_OUT= 2 A,
C_FF = 10 nF

Figure 15. Start-Up Waveform vs Time and C_NR/SS

TPS7A52-Q1 Load_trans_vs_Vout_no_bias.gif

I_{OUT, DC}= 100 mA,
C_NR/SS = C_FF = 10 nF, slew rate = 1 A/µs

Figure 17. Load Transient vs Time and V_OUT Without Bias

TPS7A52-Q1 Fig19-LoadtransientVout=5VvsDCload.gif

RGR package, V_OUT = 0.9 V, V_IN = 1.2 V, V_BIAS = 5.0 V,
C_NR/SS = C_FF = 10 nF, slew rate = 1 A/µs

Figure 19. Load Transient vs Time and DC Load

RGR package, I_OUT = 2 A, V_BIAS = 6.5 V

Figure 21. Dropout Voltage vs Input Voltage With Bias

RGR package, V_IN = 1.1 V, V_BIAS = 3 V

Figure 23. Dropout Voltage vs Output Current With Bias

V_IN = 1.4 V, V_BIAS = 0 V

Figure 25. Load Regulation With Bias

V_BIAS = 0 V, I_OUT = 5 mA

Figure 27. Ground Current vs Input Voltage

V_BIAS = 0 V

Figure 29. Shutdown Current vs Input Voltage

V_BIAS = 0 V

Figure 31. NR/SS Current vs Temperature

V_IN = 1.1 V

Figure 33. V_BIAS UVLO vs Temperature

Figure 35. PG Voltage vs PG Current Sink

Figure 37. PG Threshold vs Temperature

TPS7A52-Q1 Fig2-PSRRvsFrequencyandVin.gif

I_OUT = 2 A, V_BIAS = 5 V,
C_NR/SS = 10 nF, C_FF = 10 nF

Figure 2. PSRR vs Frequency and V_IN With Bias

TPS7A52-Q1 Fig4-PSRRvsFrequencyandVin_Vbias.gif

I_OUT = 1 A,
C_NR/SS = 10 nF, C_FF = 10 nF

Figure 4. PSRR vs Frequency and V_IN

TPS7A52-Q1 Fig6-PSRRvsFrequencyandVin,Vout=3.3V.gif

V_OUT = 3.3 V, I_OUT = 2 A,
C_NR/SS = 10 nF, C_FF = 10 nF

Figure 6. PSRR vs Frequency and V_IN for V_OUT = 3.3 V

V_IN = V_OUT + 0.3 V, V_OUT = 1 V, I_OUT = 2 A,
C_NR/SS = 10 nF, C_FF = 10 nF

Figure 8. V_BIAS PSRR vs Frequency and V_BIAS

TPS7A52-Q1 Fig10-OutputVoltageNoisevsFreqvsVout.gif

V_IN= V_OUT + 0.3 V and V_BIAS = 5 V for V_OUT ≤ 2.2 V, I_OUT = 2 A,, C_NR/SS = 10 nF, C_FF = 10 nF,
RMS noise BW = 10 Hz to 100 kHz

Figure 10. Output Noise vs Frequency and V_OUT

TPS7A52-Q1 Fig12-OutputVoltageNoisevsFreqvsCnrss.gif

V_IN= V_OUT + 0.3 V, V_BIAS = 5 V, I_OUT = 2 A,
C_FF = 10 nF, RMS noise BW = 10 Hz to 100 kHz

Figure 12. Output Noise vs Frequency and C_NR/SS

TPS7A52-Q1 Fig14-OutputVoltageNoisevsFreqvsCnrss-CffVout=5V.gif

V_OUT = 5 V, I_OUT = 2 A, C_FF = 10 nF, RMS noise BW = 10 Hz to 100 kHz

Figure 14. Output Noise at V_OUT = 5 V

V_IN = V_OUT + 0.3 V, V_BIAS = 5 V, I_{OUT, DC}= 100 mA, slew rate = 1 A/µs, C_NR/SS = C_FF = 10 nF

Figure 16. Load Transient vs Time and V_OUT With Bias

V_OUT = 5 V, I_{OUT, DC}= 100 mA, I_OUT = 100 mA to 2 A,
C_NR/SS = C_FF = 10 nF

Figure 18. Load Transient vs Time and Slew Rate

I_OUT = 2 A, V_BIAS = 0 V

Figure 20. Dropout Voltage vs Input Voltage Without Bias

RGR package, V_IN = 1.4 V, V_BIAS = 0 V

Figure 22. Dropout Voltage vs Output Current Without Bias

RGR package, V_IN = 5.5 V

Figure 24. Dropout Voltage vs Output Current (High V_IN)

V_OUT = 0.8 V, V_BIAS = 0 V, I_OUT = 5 mA

Figure 26. Line Regulation Without Bias

V_IN = 1.1 V, I_OUT = 5 mA

Figure 28. Ground Current vs Bias Voltage

V_IN = 1.1 V

Figure 30. Shutdown Current vs Bias Voltage

Figure 32. V_IN UVLO vs Temperature

V_IN = 1.4 V, 6.5 V

Figure 34. Enable Threshold vs Temperature

V_IN = 6.5 V

Figure 36. PG Voltage vs PG Current Sink

Temperature limited because of power dissipation

Figure 38. Foldback Current Limit vs Output Voltage