ZHCSLA4E May 2020 – October 2024 TPS61378-Q1
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| POWER SUPPLY | ||||||
| VIN | Input voltage range | 2.3 | 14 | V | ||
| VIN_UVLO | VIN under voltage lockout threshold | VIN rising | 2.2 | 2.3 | V | |
| VIN falling | 2.04 | 2.2 | V | |||
| VIN_HYS | VIN UVLO hysteresis | 160 | mV | |||
| VCC_UVLO | VCC UVLO threshold | VCC rising | 2.2 | V | ||
| VCC_HYS | VCC UVLO hysteresis | VCC hysteresis | 150 | mV | ||
| VCC | VCC regulation | IVCC = 6 mA, VOUT = 9V | 4.8 | V | ||
| IQ | Quiescent current into VIN pin | IC enabled, no load, VIN = 3.3 V, VOUT = 18.5 V, VFB = VREF + 0.1 V, |
25 | 35 | μA | |
| IQ | Quiescent current into OUT pin | IC enabled, no load, VIN = 3.3 V, VOUT = 18.5 V, VFB = VREF + 0.1 V, |
10 | 20 | μA | |
| ISD | Shutdown current into VIN pin | IC disabled, VIN =14 V, EN = GND | 0.6 | 5 | μA | |
| ISW_LKG | Leakage current into SW | IC disabled, VIN = OUT = SW =14 V | 5 | μA | ||
| IVO_LKG | Reverse leakage current into VO | IC disabled, OUT= VO = 5 V, SW = 0 | 5 | μA | ||
| OUTPUT VOLTAGE | ||||||
| VOVP | Output over-voltage protection threshold | VIN = 3.3 V, VOUT rising | 19.3 | 20 | 20.5 | V |
| VOVP_HYS | Output over-voltage protection hysteresis | VIN = 3.3 V, OVP threshold | 0.5 | V | ||
| VOLTAGE REFERENCE | ||||||
| VREF | Reference Voltage at FB pin | TJ = -40 to 125°C, RFB = 16.0k? | 0.788 | 0.800 | 0.812 | V |
| VOUT_5V | TJ = -40 to 125°C, RFB = 2.0 k? | 4.85 | 5.00 | 5.15 | V | |
| VOUT_5.25V | TJ = -40 to 125°C, RFB = 4.0 k? | 5.10 | 5.25 | 5.35 | V | |
| VOUT_5.5V | TJ = -40 to 125°C, RFB = 8.0 k? | 5.35 | 5.50 | 5.65 | V | |
| VOUT_5V | TPS613783Q1, TJ = -40 to 125°C, RFB = 2.0 k? | 4.85 | 5.00 | 5.15 | V | |
| VOUT_5.25V | TPS613783Q1, TJ = -40 to 125°C, RFB = 4.0 k? | 5.10 | 5.25 | 5.35 | V | |
| VOUT_5.5V | TPS613783Q1, TJ = -40 to 125°C, RFB = 8.0 k? | 5.35 | 5.50 | 5.65 | V | |
| VOUT_9V | TPS613785Q1, TJ = -40 to 125°C, RFB = 2.0 k? | 8.75 | 9.00 | 9.15 | V | |
| VOUT_10V | TPS613785Q1, TJ = -40 to 125°C, RFB = 4.0 k? | 9.75 | 10.00 | 10.20 | V | |
| VOUT_11V | TPS613785Q1, TJ = -40 to 125°C, RFB = 8.0 k? | 10.70 | 11.00 | 11.20 | V | |
| VOUT_12V | TPS613785Q1, TJ = -40 to 125°C, RFB = 16.0 k? | 11.70 | 12.00 | 12.22 | V | |
| IFB_LKG | Leakage current into FB pin | 50 | nA | |||
| POWER SWITCH | ||||||
| RDS(on) | Low-side MOSFET on resistance | VCC = 4.85 V | 50 | mΩ | ||
| RDS(on) | High-side MOSFET on resistance | VCC = 4.85 V | 50 | mΩ | ||
| RDS(on) | Isolation MOSFET on resistance | VCC = 4.85 V | 100 | mΩ | ||
| CURRENT LIMIT | ||||||
| ILIM_SW | Peak switching current limit FPWM | RLIM = 20 kΩ , Duty cycle = 65% | 4 | 4.8 | 5.55 | A |
| ILIM_SW | Peak switching current limit Auto PFM | RLIM = 20 kΩ , Duty cycle = 65% | 4 | 4.8 | 5.55 | A |
| ILIM_SW | Peak switching current limit FPWM | RLIM = 102 kΩ, Duty cycle = 65%, 4.7uH | 0.75 | A | ||
| ILIM_SW | Peak switching current limit Auto PFM | RLIM = 102 kΩ, Duty cycle = 65%, 4.7uH | 0.75 | A | ||
| ILIM_SS_1 | Peak switching current limit at softstart | VIN = 3.3 V, VOUT = 0 V, RLIM = 20 kΩ | 0.9 | 1.15 | 1.4 | A |
| SWITCHING FREQUENCY | ||||||
| Fsw | Switching frequency | RFREQ = 18 kΩ | 2050 | 2200 | 2400 | kHz |
| Fsw | Switching frequency | RFREQ = 218 kΩ | 180 | 200 | 230 | kHz |
| Dmax | Maximum Duty Cycle | RFREQ = 18 kΩ | 78 | % | ||
| tON_min | Minimal on time | 70 | ns | |||
| FDITHER | 10% | Fsw | ||||
| Fpattern | 0.4% | Fsw | ||||
| ERROR AMPLIFIER | ||||||
| ISINK | COMP pin sink current | VFB = VREF + 0.2V | 6 | μA | ||
| ISOURCE | COMP pin source current | VFB = VREF - 0.2V | 6 | μA | ||
| VCCLPH | COMP pin high clamp voltage | VFB = VREF - 0.2V, ILIM = 4.8 A | 1.3 | V | ||
| VCCLPL | COMP pin high low voltage | VFB = VREF + 0.2V, | 0.6 | V | ||
| GmEA | Error amplifier trans conductance | VCOMP = 1.0 V | 70 | μS | ||
| POWER GOOD | ||||||
| VPG_TH | PG threhold for rising FB voltage | Reference to VREF | 90% | |||
| VPG_HYS | PG hysteresis | Reference to VREF | 5% | |||
| IPG_SINK | PG pin sink current capability | VPG = 0.4 V | 20 | mA | ||
| tPG_DELAY | PG delay time | 2.5 | 3.4 | 4.3 | ms | |
| DOWN MODE | ||||||
| tEN_DELAY | Delay time between EN high and device working | 0.4 | ms | |||
| tSS | Softstart time | 2.5 | ms | |||
| tHCP_ON | Hiccup on time | 1.8 | ms | |||
| tHCP_OFF | Hiccup off time | 67 | ms | |||
| SYNC TIMING | ||||||
| fSYNC_MIN | 200 | kHz | ||||
| fSYNC_MAX | 2200 | kHz | ||||
| EN/SYNC LOGIC | ||||||
| VIH | EN, MODE/SYNC pins Logic high threshold | 1.2 | V | |||
| VIL | EN, MODE/SYNC pins Logic Low threshold | 0.4 | V | |||
| RDOWN | EN, MODE/SYNC pins internal pull down resistor | 800 | kΩ | |||
| THERMAL SHUTDOWN | ||||||
| tSD_R | Thermal shutdown rising threshold | TJ rising | 165 | °C | ||
| tSD_F | Thermal shutdown falling threshold | TJ falling | 145 | °C | ||