ZHCSGO0A June 2017 – February 2024 TPS549B22
PRODUCTION DATA
- 1
- 1 特性
- 2 應用
- 3 說明
- 4 Pin Configuration and Functions
- 5 Specifications
-
6 Detailed Description
- 6.1 Overview
- 6.2 Functional Block Diagram
- 6.3 Feature Description
- 6.4 Device Functional Modes
- 6.5 Programming
-
7 Register Maps
- 7.1 OPERATION Register (address = 1h)
- 7.2 ON_OFF_CONFIG Register (address = 2h)
- 7.3 CLEAR FAULTS (address = 3h)
- 7.4 WRITE PROTECT (address = 10h)
- 7.5 STORE_DEFAULT_ALL (address = 11h)
- 7.6 RESTORE_DEFAULT_ALL (address = 12h)
- 7.7 CAPABILITY (address = 19h)
- 7.8 VOUT_MODE (address = 20h)
- 7.9 VOUT_COMMAND (address = 21h)
- 7.10 VOUT_MARGIN_HIGH (address = 25h) ?
- 7.11 VOUT_MARGIN_LOW (address = 26h)
- 7.12 STATUS_BYTE (address = 78h)
- 7.13 STATUS_WORD (High Byte) (address = 79h)
- 7.14 STATUS_VOUT (address = 7Ah)
- 7.15 STATUS_IOUT (address = 7Bh)
- 7.16 STATUS_CML (address = 7Eh)
- 7.17 MFR_SPECIFIC_00 (address = D0h)
- 7.18 MFR_SPECIFIC_01 (address = D1h)
- 7.19 MFR_SPECIFIC_02 (address = D2h)
- 7.20 MFR_SPECIFIC_03 (address = D3h)
- 7.21 MFR_SPECIFIC_04 (address = D4h)
- 7.22 MFR_SPECIFIC_06 (address = D6h)
- 7.23 MFR_SPECIFIC_07 (address = D7h)
- 7.24 MFR_SPECIFIC_44 (address = FCh)
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Applications
- 8.2.1 TPS549B22 1.5-V to 18-V Input, 1-V Output, 25-A Converter
- 8.2.2 Design Requirements
- 8.2.3
Detailed Design Procedure
- 8.2.3.1 Custom Design With WEBENCH? Tools
- 8.2.3.2 Switching Frequency Selection
- 8.2.3.3 Inductor Selection
- 8.2.3.4 Output Capacitor Selection
- 8.2.3.5 Input Capacitor Selection
- 8.2.3.6 Bootstrap Capacitor Selection
- 8.2.3.7 BP Pin
- 8.2.3.8 R-C Snubber and VIN Pin High-Frequency Bypass
- 8.2.3.9 Optimize Reference Voltage (VSEL)
- 8.2.3.10 MODE Pin Selection
- 8.2.3.11 ADDR Pin Selection
- 8.2.3.12 Overcurrent Limit Design
- 8.2.4 Application Curves
- 8.3 Power Supply Recommendations
- 8.4 Layout
- 9 Device and Documentation Support
- 10Revision History
- 11Mechanical, Packaging, and Orderable Information
封裝選項
請參考 PDF 數據表獲取器件具體的封裝圖。
機械數據 (封裝 | 引腳)
- RVF|40
散熱焊盤機械數據 (封裝 | 引腳)
- RVF|40
訂購信息
4 Pin Configuration and Functions
Figure 4-1 RVF Package40-Pin LQFN-CLIP With Thermal PadTop ViewTable 4-1 Pin Functions
| PIN | TYPE(1) | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| ADDR | 32 | I | Program device address and SKIP or FCCM mode. |
| AGND | 30 | G | Ground pin for internal analog circuits. |
| BOOT | 5 | P | Supply rail for high-side gate driver (boot terminal). Connect boot capacitor from this pin to SW node. Internally connected to BP via bootstrap PMOS switch. |
| BP | 31 | O | LDO output |
| DRGND | 29 | P | Internal gate driver return. |
| EN_UVLO | 4 | I | Enable pin that can turn on the DC/DC switching converter. Use also to program the required PVIN UVLO when PVIN and VDD are connected together. |
| ILIM | 36 | I/O | Program overcurrent limit by connecting a resistor to ground. |
| MODE | 34 | I | Mode selection pin. Select the control mode, and soft-start timing selection. |
| NC | 6, 7, 26, 27 | No connect. | |
| PGND | 13, 14, 15, 16, 17, 18, 19, 20 | P | Power ground of internal FETs. |
| PGOOD | 35 | O | Open drain power-good status signal. |
| PMB_CLK | 3 | I | Clock input for the PMBus interface. |
| PMB_DATA | 2 | I/O | Data I/O for the PMBus interface. |
| PVIN | 21, 22, 23, 24, 25 | P | Power supply input for integrated power MOSFET pair. |
| RSN | 38 | I | Inverting input of the differential remote sense amplifier. |
| RSP | 39 | I | Non-inverting input of the differential remote sense amplifier. |
| RESV_TRK | 37 | I | Do not connect. |
| SMB_ALRT# | 1 | O | Alert output for the PMBus interface. |
| SW | 8, 9, 10, 11, 12 | I/O | Output switching terminal of power converter. Connect the pins to the output inductor. |
| VDD | 28 | P | Controller power supply input. |
| VOSNS | 40 | I | Output voltage monitor input pin. |
| VSEL | 33 | I | Program the initial start-up and or reference voltage without feedback resistor dividers (from 0.6 V to 1.2 V in 50-mV increments). |
(1) I = input, O = output, G = GND