ZHCSR16 September 2022 TPS544C26
ADVANCE INFORMATION
| CMD Address | A9h |
| Write Transaction: | Write Byte |
| Read Transaction: | Read Byte |
| Format: | Unsigned Binary (1 byte) |
| NVM Back-up: | EEPROM |
| Updates: | On-the-fly |
The COMP1_MAIN command contains 2 fields (AC Gain and AC Load Line) for the control loop compensation. See Loop Compensation for more details.
The AC_GAIN bits select the gain of the AC paths including the output voltage error and the load current step.
The AC Load Line (ACLL) bits set the AC response to an output voltage error.
Return to Supported I2C and Default Values.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| AC_GAIN | ACLL | ||||||
| LEGEND: R/W = Read/Write; R = Read only |
| Bit | Field | Access | Reset | Description |
|---|---|---|---|---|
| 7:4 | AC_GAIN | R/W | NVM | These bits determine the AC
gain setting. 0000b: AC Gain = 0.3 0001b: AC Gain = 0.5 0010b: AC Gain = 1.0 0011b: AC Gain = 1.5 0100b: AC Gain = 2.0 0101b: AC Gain = 2.5 0110b: AC Gain = 3.0 0111b: AC Gain = 3.5 1000b: AC Gain = 4.0 1001b: AC Gain = 5.0 1010b: AC Gain = 6.0 1011b: AC Gain = 7.0 1100b to 1111b: Reserved. Do not set AC Gain to these values. |
| 3:0 | ACLL | R/W | NVM | These bits determine the AC
Load Line (ACLL) setting. 0000b: ACLL = 0.5 0001b: ACLL = 1.0 0010b: ACLL = 1.5 0011b: ACLL = 2.0 0100b: ACLL = 2.5 0101b: ACLL = 3.0 0110b: ACLL = 3.5 0111b: ACLL = 4.0 1000b: ACLL = 5.0 1001b: ACLL = 6.0 1010b: ACLL = 7.0 1011b: ACLL = 9.0 1100b: ACLL = 10.0 1101b: ACLL = 12.0 1110b: ACLL = 13.0 1111b: ACLL = 15.0 |