ZHCSR16 September 2022 TPS544C26
ADVANCE INFORMATION
| CMD Address | ACh |
| Write Transaction: | Write Byte |
| Read Transaction: | Read Byte |
| Format: | Unsigned Binary (1 byte) |
| NVM Back-up: | EEPROM |
| Updates: | On-the-fly |
This COMP2_ALT command contains 3 alternate fields for configuring the internal integration circuit and the ramp generation circuit. This register is not activated in the TPS544C26 device and affects nothing.
Return to Supported I2C and Default Values.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| INT_GAIN_ALT | INT_TIME_ALT | RAMP_ALT | |||||
| LEGEND: R/W = Read/Write; R = Read only |
| Bit | Field | Access | Reset | Description |
|---|---|---|---|---|
| 7:6 | INT_GAIN_ALT | R/W | NVM | These bits selects the gain
of the integration stage. 00b: alternate integration stage gain = 2 01b: alternate integration stage gain = 1.5 10b: alternate integration stage gain = 1 11b: alternate integration stage gain = 0.5 |
| 5:3 | INT_TIME_ALT | R/W | NVM | These bits set the time
constant of the integration stage which affects the settling and
response time following an output voltage error. 000b: alternate integration time constant = 0.25 μs 001b: alternate integration time constant = 1.0 μs 010b: alternate integration time constant = 3.0 μs 011b: alternate integration time constant = 4.5 μs 100b: alternate integration time constant = 6.25 μs 101b: alternate integration time constant = 8.0 μs 110b: alternate integration time constant = 10.0 μs 111b: alternate integration time constant = 20.0 μs |
| 2:0 | RAMP_ALT | R/W | NVM | These bits select the
amplitude of the internal-generated ramp. 000b: alternate ramp amplitude = 40 mV 001b: alternate ramp amplitude = 60 mV 010b: alternate ramp amplitude = 80 mV 011b: alternate ramp amplitude = 100 mV 100b: alternate ramp amplitude = 120 mV 101b: alternate ramp amplitude = 160 mV 110b: alternate ramp amplitude = 200 mV 111b: alternate ramp amplitude = 240 mV |