ZHCSJN5A February 2018 – April 2019 TPS2HB50-Q1
ADVANCE INFORMATION for pre-production products; subject to change without notice.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SNS TIMING - CURRENT SENSE | ||||||
| tSNSION1 | Settling time from rising edge of DIA_EN | VENx = 5 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ, RL ≤ 6 Ω |
40 | µs | ||
| tSNSION2 | Settling time from rising edge of ENx and DIA_EN | VENx = VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ, RL ≤ 6 Ω |
165 | µs | ||
| tSNSION3 | Settling time from rising edge of ENx | VENx = 0 V to 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, RL ≤ 6 Ω |
165 | µs | ||
| tSNSIOFF1 | Settling time from falling edge of DIA_EN | VENx = 5 V, VDIA_EN = 5 V to 0 V
RSNS = 1 kΩ, RL ≤ 6 Ω |
20 | µs | ||
| tSETTLEH | Settling time from rising edge of load step | VEN1 = 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, IOUT = 5 A to 1 A |
20 | µs | ||
| tSETTLEL | Settling time from falling edge of load step | VENx = 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, IOUT = 5 A to 1 A |
20 | µs | ||
| SNS TIMING - TEMPERATURE SENSE | ||||||
| tSNSTON1 | Settling time from rising edge of DIA_EN | VENx = 5 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ |
40 | µs | ||
| tSNSTON2 | Settling time from rising edge of DIA_EN | VENx = 0 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ |
70 | µs | ||
| tSNSTOFF | Settling time from falling edge of DIA_EN | VENx = X, VDIA_EN = 5 V to 0 V
RSNS = 1 kΩ |
20 | µs | ||
| SNS TIMING - MULTIPLEXER | ||||||
| tMUX | Settling time from temperature sense to current sense | VENx = X, VDIA_EN = 5 V
VSEL1 = 5 V to 0 V, VSEL2 = X RSNS = 1 kΩ, RL ≤ 6 Ω |
60 | µs | ||
| Settling time from current sense on CHx to CHy | VENx = X, VDIA_EN = 5 V
VSEL1 = 0 V, VSEL2 = 0 V to 5 V RSNS = 1 kΩ, IOUT1 = 2 A, IOUT2 = 4 A |
20 | µs | |||
| Settling time from current sense to temperature sense | VENx = X, VDIA_EN = 5 V
VSEL1 = 0 V to 5 V, VSEL2 = X RSNS = 1 kΩ, RL ≤ 6 Ω |
60 | µs | |||