ZHCSL91B October 2020 – March 2022 TPS25947
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Input Reverse Polarity Protection
- 8.3.2 Undervoltage Lockout (UVLO and UVP)
- 8.3.3 Overvoltage Lockout (OVLO)
- 8.3.4 Overvoltage Clamp (OVC)
- 8.3.5 Inrush Current, Overcurrent, and Short Circuit Protection
- 8.3.6 Analog Load Current Monitor
- 8.3.7 Reverse Current Protection
- 8.3.8 Overtemperature Protection (OTP)
- 8.3.9 Fault Response and Indication (FLT)
- 8.3.10 Auxiliary Channel Control (AUXOFF)
- 8.3.11 Power Good Indication (PG)
- 8.4 Device Functional Modes
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
9.7 Parallel Operation
Applications which need higher steady current can use 2 TPS25947xx devices connected in parallel as shown in Figure 9-18 below. In this configuration, the first device turns on initially to provide the inrush current limiting. The second device is held in an OFF state by driving its EN/UVLO pin low using the AUXOFF/PG signal of the first device. After the inrush sequence is complete, the first device asserts its AUXOFF/PG pin high and turns on the second device. The second device asserts its AUXOFF/PG signal to indicate when it has turned on fully, thereby indicating to the system that the parallel combination is ready to deliver the full steady state current.
After in steady state, both devices share current nearly equally. There can be a slight skew in the currents depending on the part-to-part variation in the RON as well as the PCB trace resistance mismatch.
Figure 9-18 Two Devices Connected in Parallel for Higher
Steady State Current CapabilityThe waveforms below illustrate the behavior of the parallel configuration during start-up as well as during steady state.
Figure 9-19 Parallel Devices Sequencing During
Start-Up
Figure 9-20 Parallel Devices Load Current During
Steady State