ZHCSF29E May 2016 – January 2021 TPS25940-Q1
PRODMIX
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Parametric Measurement Information
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3 Feature Description
- 9.4 Device Functional Modes
-
10Application and Implementation
- 10.1 Application Information
- 10.2
Typical Application
- 10.2.1 Design Requirements
- 10.2.2
Detailed Design Procedure
- 10.2.2.1 Step by Step Design Procedure
- 10.2.2.2 Programming the Current-Limit Threshold: R(ILIM) Selection
- 10.2.2.3 Undervoltage Lockout and Overvoltage Set Point
- 10.2.2.4 Programming Current Monitoring Resistor—RIMON
- 10.2.2.5 Setting Output Voltage Ramp Time (tdVdT)
- 10.2.2.6 Programing the Power Good Set Point
- 10.2.2.7 Support Component Selections—R6, R7 and CIN
- 10.2.3 Application Curves
- 10.2.4 System Examples
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information
6 Pin Configuration and Functions
Figure 6-1 RVC Package20-Pin WQFNTop ViewTable 6-1 Pin Functions
| PIN | TYPE | DESCRIPTION | |
|---|---|---|---|
| NO. | NAME | ||
| 1 | DEVSLP | I | Active high. DevSleep mode control. A high at this pin activates the DevSleep mode (low power mode). If unused, leave floating or connect it to GND. |
| 2 | PGOOD | O | Active high. A high indicates PGTH has crossed the threshold value. It is an open drain output. If unused, leave floating. |
| 3 | PGTH | I | Positive input of PGOOD comparator. If unused connect to OUT or GND. |
| 4 | OUT | O | Power output of the device. |
| 5 | |||
| 6 | |||
| 7 | |||
| 8 | |||
| 9 | IN | I | Power input and supply voltage of the device. |
| 10 | |||
| 11 | |||
| 12 | |||
| 13 | |||
| 14 | EN/UVLO | I | Input for setting programmable undervoltage lockout threshold. An undervoltage event opens internal FET and assert FLT to indicate power-failure. |
| 15 | OVP | I | Input for setting programmable overvoltage protection threshold. An overvoltage event opens the internal FET and assert FLT to indicate overvoltage. |
| 16 | GND | — | Ground. The GND terminal must be connected to the exposed PowerPAD. This PowerPAD must be connected to a PCB ground plane using multiple vias for good thermal performance. |
| 17 | ILIM | I/O | A resistor from this pin to GND sets the overload and short-circuit current limit. |
| 18 | dVdT | I/O | A capacitor from this pin to GND sets the ramp rate of output voltage. |
| 19 | IMON | O | This pin sources a scaled down ratio of current through the internal FET. A resistor from this pin to GND converts current to proportional voltage, used as analog current monitor. If unused, leave floating. |
| 20 | FLT | O | Fault event indicator, goes low to indicate fault condition because of undervoltage, overvoltage, reverse voltage and thermal shutdown event. It is an open drain output. If unused, leave floating. |