By following similar design procedure as outlined in Detailed Design Procedure, the external component values are calculated as below:

• R_SNS = 1 mΩ.

• R_SET = 100 Ω.

• R_IWRN = 49.9 kΩ to set 24 A as overcurrent protection threshold.

• R_ISCP = 1.468 kΩ to set 30 A as short-circuit protection threshold.

• C_TMR = 68 nF to set 1-ms over current protection time.

• R₁ , R₂ and R₃ are selected as 390 kΩ, 71.5 kΩ and 15.8 kΩ respectively to set VIN undervoltage lockout threshold at 6.5 V and overvoltage cutoff threshold at 36 V.
• R_IMON = 15 kΩ to limit maximum V_(IMON) voltage to 3.3 V at full-load current of 24 A.
• To reduce conduction losses, BUK7S0R5-40HJ MOSFET is selected. Two FETs are used in back-to-back configuration for reverse current blocking.
  • 40-V V_DS(MAX) and 20-V V_GS(MAX).
  • R_DS(ON) is 0.47-mΩ typical at 10-V V_GS.
  • Q_g of each MOSFET is 190 nC.
• C_BST = (2 × Q_g) / 1 V = 380 nF; Choose the closest available standard value: 470 nF, 10 %.
• Q₄ selection: Any signal N-MOSFET with 40-V V_DS support is sufficient. DMN601WKQ-7 is selected for the current design and a 12-V Zener diode SZMM3Z12VST1G is used for V_GS protection.