ZHCSNC9C february 2021 – july 2023 TMUX7308F , TMUX7309F
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
-
7 Specifications
- 7.1 Absolute Maximum Ratings
- 7.2 ESD Ratings
- 7.3 Thermal Information
- 7.4 Recommended Operating Conditions
- 7.5 Electrical Characteristics (Global)
- 7.6 ±15 V Dual Supply: Electrical Characteristics
- 7.7 ±20 V Dual Supply: Electrical Characteristics
- 7.8 12 V Single Supply: Electrical Characteristics
- 7.9 36 V Single Supply: Electrical Characteristics
- 7.10 Typical Characteristics
-
8 Parameter Measurement Information
- 8.1 On-Resistance
- 8.2 Off-Leakage Current
- 8.3 On-Leakage Current
- 8.4 Input and Output Leakage Current Under Overvoltage Fault
- 8.5 Break-Before-Make Delay
- 8.6 Enable Delay Time
- 8.7 Transition Time
- 8.8 Fault Response Time
- 8.9 Fault Recovery Time
- 8.10 Charge Injection
- 8.11 Off Isolation
- 8.12 Crosstalk
- 8.13 Bandwidth
- 8.14 THD + Noise
- 9 Detailed Description
- 10Application and Implementation
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
訂購信息
9.3.2.4 Overvoltage Protection and Detection
The TMUX7308F and TMUX7309F detect overvoltage inputs by comparing the voltage on a source pin (Sx) with the supplies (VDD and VSS). A signal is considered overvoltage if it exceeds the supply voltages by the threshold voltage (VT).
When an overvoltage is detected, the switch with the overvoltage automatically turns OFF, and stays OFF regardless of the logic controls. The source pin becomes high impedance and allows only a small leakage current to flow through the switch and the overvoltage does not appear on the drain. When the overvoltage channel is selected by the logic control, the drain pin (D or Dx) is pulled to the supply that was exceeded. For example, if the source voltage exceeds VDD, the drain output is pulled to VDD. If the source voltage exceeds VSS, the drain output is pulled to VSS. The pull-up impedance is approximately 40 kΩ, and as a result, the drain current is limited to roughly 1 mA during a shorted load (to GND) condition.
Figure 10-3 shows a detailed view of the how the pullup/down controls the output state of the drain pin under a fault scenario.
Figure 9-1 Detailed Functional Diagram