ZHCSK56A August 2019 – July 2020 TMUX1208-Q1
PRODUCTION DATA
| PIN | TYPE(1) | DESCRIPTION | |
|---|---|---|---|
| NAME | UQFN | ||
| A0 | 15 | I | Address line 0. Controls the switch configuration as shown in Table 8-1. |
| EN | 16 | I | Active high logic input. When this pin is low, all switches are turned off. When this pin is high, the A[2:0] address inputs determine which switch is turned on. |
| N.C. | 1 | Not Connected | Not Connected |
| S1 | 2 | I/O | Source pin 1. Can be an input or output. |
| S2 | 3 | I/O | Source pin 2. Can be an input or output. |
| S3 | 4 | I/O | Source pin 3. Can be an input or output. |
| S4 | 5 | I/O | Source pin 4. Can be an input or output. |
| D | 6 | I/O | Drain pin. Can be an input or output. |
| S8 | 7 | I/O | Source pin 8. Can be an input or output. |
| S7 | 8 | I/O | Source pin 7. Can be an input or output. |
| S6 | 9 | I/O | Source pin 6. Can be an input or output. |
| S5 | 10 | I/O | Source pin 5. Can be an input or output. |
| VDD | 11 | P | Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 μF to 10 μF between VDD and GND. |
| GND | 12 | P | Ground (0 V) reference |
| A2 | 13 | I | Address line 2. Controls the switch configuration as shown in Table 8-1. |
| A1 | 14 | I | Address line 1. Controls the switch configuration as shown in Table 8-1. |