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ZHCSMZ5D April 2020 – January 2023 TLV841

PRODUCTION DATA

封裝選項

機械數據 (封裝 | 引腳)

YBH|4
- MXBG407

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

7.5 Electrical Characteristics

At V_DDMIN ≤ V_DD ≤ 5.5 V, CT = MR = Open, RESET/RESET pull-up resistor R_pull-up ⁽³⁾ = 100 kΩ to VDD, output reset load C_LOAD = 10 pF and over the operating free-air temperature range –40℃ to 125℃, unless otherwise noted. Typical values are at T_A = 25°C

PARAMETER			TEST CONDITIONS		MIN	TYP	MAX	UNIT
COMMON PARAMETERS
V_ADJ-VIT–	Negative-going input threshold for TLV841Sxxx01 ADJ version					0.505		V
V_IT–	Negative-going input threshold range Fixed threshold version ⁽¹⁾				0.8		4.9	V
V_{IT–_ACC}	Negative-going input threshold accuracy		V_IT– = 0.505 V (TLV841Sxx01) or 0.8 V to 1.7 V (Fixed threshold)		-2.5	±0.5	2.5	%
V_{IT–_ACC}	Negative-going input threshold accuracy		V_IT– = 1.8 V to 4.9 V (Fixed threshold)		-2	±0.5	2	%
V_HYS	Hysteresis on V_IT– pin		V_IT– = 0.505 V and 0.8 V		3	5	8	%
V_HYS	Hysteresis on V_IT– pin		V_IT– = 0.9 V to 4.9 V		3	5	7	%
V_POR	Power on reset voltage ⁽²⁾		TLV841xxxLxx	V_OL(MAX) = 300 mV I_RESET(Sink) = 15 μA			700	mV
V_POR	Power on reset voltage ⁽²⁾		TLV841xxxHxx	V_OH(MIN) = 0.8VDD I_{RESET(Source)} = 15 μA			900	mV
V_OL	Low level output voltage			V_DD = 0.85 V I_RESET(Sink) = 15 μA I_RESET(Sink) = 15 μA			300	mV
				V_DD = 3.3 V I_RESET(Sink) = 2 mA I_RESET(Sink) = 2 mA			300	mV
				V_DD = 5.5 V I_RESET(Sink) = 2 mA I_RESET(Sink) = 2 mA			300	mV
V_OH	High level output voltage			V_DD = 1 V I_{RESET(Source)} = 15 μA I_{RESET(Source)} = 15 μA	0.8V_DD			V
				V_DD = 1.8 V I_{RESET(Source)} = 500 μA I_{RESET(Source)} = 500 μA	0.8V_DD			V
				V_DD ≥ 3.3 V I_{RESET(Source)} = 2 mA I_{RESET(Source)} = 2 mA	0.8V_DD			V
I_lkg(OD)	Open-Drain output leakage current		V_DD = V_PULLUP = 5.5 V	T_A = –40℃ to 85℃		10	100	nA
I_lkg(OD)	Open-Drain output leakage current		V_DD = V_PULLUP = 5.5 V			10	350	nA
I_DD	Supply current into VDD pin	Supply current into VDD pin	V_DD = 5.5 V V_IT– = 1.9 V to 4.9 V			0.125	1	μA
TLV841S
I_SENSE	Current into SENSE pin, fixed threshold variant		V_DD = V_SENSE = 5.5 V V_IT– = 0.8 V to 4.9 V			0.025	0.1	μA
I_SENSE	Current into SENSE pin, ADJ variant		V_DD = V_SENSE = 5.5 V V_IT– = 0.505 V			0.025	0.05	μA
TLV841M
V_{MR_L}	Manual reset logic low input						0.3V_DD	V
V_{MR_H}	Manual reset logic high input				0.7V_DD			V
R_MR	Manual reset internal pull-up resistance					100		kΩ
TLV841C
R_CT	CT pin internal resistance				410	500	590	kΩ

(1) V_IT- threshold voltage range from 0.8 V to 4.9 V (for DL, PL, DH) and 1 V to 4.9 V (for PH) in 100 mV steps, for released versions see Device Voltage Thresholds table.

(2) V_POR is the minimum V_DD voltage level for a controlled output state.

(3) Pull up resistance applicable for open drain variants