ZHCSOZ3 September 2021 TLIN1024A-Q1
PRODUCTION DATA
Figure 6-1 RGY
Package,24-Pin RGY (VQFN),Top View| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| RXD1 | 1 | O | Channel 1 RXD Output (open-drain) interface reporting state of LIN1 bus voltage |
| EN1 | 2 | I | Channel 1 Enable Input |
| TXD1 | 3 | I | Channel 1 TXD input interface to control state of LIN1 output |
| RXD2 | 4 | O | Channel 2 RXD Output (open-drain) interface reporting state of LIN2 bus voltage |
| EN2 | 5 | I | Channel 2 Enable Input |
| TXD2 | 6 | I | Channel 2 TXD input interface to control state of LIN2 output |
| RXD3 | 7 | O | Channel 3 RXD Output (open-drain) interface reporting state of LIN3 bus voltage |
| EN3 | 8 | I | Channel 3 Enable Input |
| TXD3 | 9 | I | Channel 3 TXD input interface to control state of LIN3 output |
| RXD4 | 10 | O | Channel 4 RXD Output (open-drain) interface reporting state of LIN4 bus voltage |
| EN4 | 11 | I | Channel 4 Enable Input |
| TXD4 | 12 | I | Channel 4 TXD input interface to control state of LIN4 output |
| GND2 | 14 | GND | Ground pin for Channels 3 and 4 |
| LIN4 | 15 | I/O | Channel 4 LIN Bus single-wire transmitter and receiver |
| VSUP2 | 16 | Supply | Channels 3 and 4 Supply Voltage (connected to battery in series with external reverse blocking diode) |
| LIN3 | 17 | I/O | Channel 3 LIN Bus single-wire transmitter and receiver |
| GND1 | 19 | GND | Ground pin for Channels 1 and 2 |
| LIN2 | 20 | I/O | Channel 2 LIN Bus single-wire transmitter and receiver |
| VSUP1 | 21 | Supply | Channels 1 and 2 Supply Voltage (connected to battery in series with external reverse blocking diode) |
| LIN1 | 22 | I/O | Channel 1 LIN Bus single-wire transmitter and receiver |
| NC | 13, 18, 23, 24 | – | Not Connected |
| Thermal Pad | – | Can be connected to the PCB ground plane to improve thermal coupling | |