ZHCS290G September 2009 – June 2018 TCA8418
PRODUCTION DATA.
| BIT | NAME | DESCRIPTION |
|---|---|---|
| 7 | N/A | Always 0 |
| 6 | N/A | Always 0 |
| 5 | N/A | Always 0 |
| 4 | CAD_INT |
CTRL-ALT-DEL key sequence status. Requires writing a 1 to clear interrupts. 0 = interrupt not detected 1 = interrupt detected |
| 3 | OVR_FLOW_INT |
Overflow interrupt status. Requires writing a 1 to clear interrupts. 0 = interrupt not detected 1 = interrupt detected |
| 2 | K_LCK_INT |
Keypad lock interrupt status. This is the interrupt to the processor when the keypad lock sequence is started. Requires writing a 1 to clear interrupts. 0 = interrupt not detected 1 = interrupt detected |
| 1 | GPI_INT |
GPI interrupt status. Requires writing a 1 to clear interrupts. 0 = interrupt not detected 1 = interrupt detected Can be used to mask interrupts |
| 0 | K_INT |
Key events interrupt status. Requires writing a 1 to clear interrupts. 0 = interrupt not detected 1 = interrupt detected |
The INT_STAT register is used to check which type of interrupt has been triggered. If the corresponding interrupt enable bits are set in the Configuration Register, then a value of 1 in the corresponding bit will assert the INT line low. An exception to this is the CAD_INT bit, which will assert the CAD_INT pin on YFP packages.
A read to this register will return which types of events have occurred. Writing a 1 to the bit will clear the interrupt, unless there is still data which has set the Interrupt (unread keys in the FIFO).