ZHCSJ69A October 2018 – December 2018 TAS2562
PRODUCTION DATA.
Sets TDM TX bus keeper, fill, offset and transmit edge.
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7 | TX_KEEPCY | RW | 0h | TDM TX SDOUT LSB data will be driven for
0b = full-cycle 1b = half-cycle |
| 6 | TX_KEEPLN | RW | 0h | TDM TX SDOUT will hold the bus for the following when TX_KEEPEN is enabled
0b = 1 LSB cycle 1b = always |
| 5 | TX_KEEPEN | RW | 0h | TDM TX SDOUT bus keeper enable.
0b = Disable bus keeper 1b = Enable bus keeper |
| 4 | TX_FILL | RW | 1h | TDM TX SDOUT unused bitfield fill.
0b = Transmit 0 1b = Transmit Hi-Z |
| 3-1 | TX_OFFSET[2:0] | RW | 1h | TDM TX start of frame to time slot 0 offset. |
| 0 | TX_EDGE | RW | 1h | TDM TX launch clock polarity.
0b = Rising edge of SBCLK 1b = Falling edge of SBCLK |