ZHCSH84A September 2017 – December 2017 SN55HVD233-SP
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 說明 （續）
- 6 Pin Configuration and Functions
-
7 Specifications
- 7.1 Absolute Maximum Ratings
- 7.2 ESD Ratings
- 7.3 Recommended Operating Conditions
- 7.4 Thermal Information
- 7.5 Driver Electrical Characteristics
- 7.6 Receiver Electrical Characteristics
- 7.7 Driver Switching Characteristics
- 7.8 Receiver Switching Characteristics
- 7.9 Device Switching Characteristics
- 7.10 Typical Characteristics
- 8 Parameter Measurement Information
- 9 Detailed Description
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Layout
- 13器件和文檔支持
- 14機械、封裝和可訂購信息
9.3.3 CAN Bus States
The CAN bus has two states during powered operation of the device: dominant and recessive. A dominant bus state is when the bus is driven differentially, corresponding to a logic low on the D and R pin. A recessive bus state is when the bus is biased to VCC / 2 through the high-resistance internal input resistors RIN of the receiver, corresponding to a logic high on the D and R pins (see Figure 25 and Figure 26).
Figure 25. Bus States (Physical Bit Representation)
Figure 26. Simplified Recessive Common Mode Bias and Receiver