ZHCSAC2C August 2012 – October 2018 PCM5121 , PCM5122
PRODUCTION DATA.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| DATA FORMAT (PCM MODE) | ||||||
| Audio data interface format | I2S, left-justified, right-justified, and TDM | |||||
| Audio data bit length | 16, 20, 24, 32-bit acceptable | |||||
| Audio data format | MSB first, twos-complement | |||||
| fS | Sampling frequency(1) | 8 | 384 | kHz | ||
| CLOCKS | ||||||
| System clock frequency | 64, 128, 192, 256, 384, 512, 768, 1024, 1152, 1536, 2048, or 3072
fSCK, up to 50 Mhz |
|||||
| PLL input frequency (2) | Clock divider uses fractional divide
D > 0, P=1 |
6.7 | 20 | MHz | ||
| Clock divider uses integer divide
D = 0, P=1 |
1 | 20 | MHz | |||
Figure 1. Timing Requirements for SCK Input
Figure 2. XSMT Timing for Soft Mute and Soft Un-Mute