SNVSBP2 February 2020 LP8758-E3
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3 Feature Description
- 7.4 Device Functional Modes
- 7.5 Programming
- 7.6
Register Maps
- 7.6.1
Register Descriptions
- 7.6.1.1 OTP_REV
- 7.6.1.2 BUCK0_CTRL1
- 7.6.1.3 BUCK0_CTRL2
- 7.6.1.4 BUCK1_CTRL1
- 7.6.1.5 BUCK1_CTRL2
- 7.6.1.6 BUCK2_CTRL1
- 7.6.1.7 BUCK2_CTRL2
- 7.6.1.8 BUCK3_CTRL1
- 7.6.1.9 BUCK3_CTRL2
- 7.6.1.10 BUCK0_VOUT
- 7.6.1.11 BUCK0_FLOOR_VOUT
- 7.6.1.12 BUCK1_VOUT
- 7.6.1.13 BUCK1_FLOOR_VOUT
- 7.6.1.14 BUCK2_VOUT
- 7.6.1.15 BUCK2_FLOOR_VOUT
- 7.6.1.16 BUCK3_VOUT
- 7.6.1.17 BUCK3_FLOOR_VOUT
- 7.6.1.18 BUCK0_DELAY
- 7.6.1.19 BUCK1_DELAY
- 7.6.1.20 BUCK2_DELAY
- 7.6.1.21 BUCK3_DELAY
- 7.6.1.22 RESET
- 7.6.1.23 CONFIG
- 7.6.1.24 INT_TOP
- 7.6.1.25 INT_BUCK_0_1
- 7.6.1.26 INT_BUCK_2_3
- 7.6.1.27 TOP_STAT
- 7.6.1.28 BUCK_0_1_STAT
- 7.6.1.29 BUCK_2_3_STAT
- 7.6.1.30 TOP_MASK
- 7.6.1.31 BUCK_0_1_MASK
- 7.6.1.32 BUCK_2_3_MASK
- 7.6.1.33 SEL_I_LOAD
- 7.6.1.34 I_LOAD_2
- 7.6.1.35 I_LOAD_1
- 7.6.1
Register Descriptions
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
6.7 Switching Characteristics
Limits apply over the junction temperature range –40°C ≤ TJ ≤ +125°C, specified V(VANA), VIN , V(NRST), VOUT and IOUT range, unless otherwise noted. Typical values are at TJ = 25°C, ƒSW = 3 MHz, V(VANA) = VIN = 3.7 V and VOUT = 1 V, unless otherwise noted.(1)| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| ƒSW | Switching frequency, PWM mode | VOUT ≥ 0.6 V | 2.7 | 3 | 3.3 | MHz |
| VOUT < 0.6 V | 1.8 | 2 | 2.2 | |||
| Start-up time (soft start) | From ENx to VOUT = 0.225 V (slew-rate control begins), COUT-TOTAL = 44 µF, no load | 140 | µs | |||
| Output voltage slew-rate(2) | SLEW_RATEx[2:0] = 000, VOUT ≥ 0.5 V | –15% | 30 | 15% | mV/µs | |
| SLEW_RATEx[2:0] = 001, VOUT ≥ 0.5 V | –15% | 15 | 15% | |||
| SLEW_RATEx[2:0] = 010, VOUT ≥ 0.5 V | –15% | 10 | 15% | |||
| SLEW_RATEx[2:0] = 011, VOUT ≥ 0.5 V | –15% | 7.5 | 15% | |||
| SLEW_RATEx[2:0] = 100, VOUT ≥ 0.5 V | –15% | 3.8 | 15% | |||
| SLEW_RATEx[2:0] = 101, VOUT ≥ 0.5 V | –15% | 1.9 | 15% | |||
| SLEW_RATEx[2:0] = 110, VOUT ≥ 0.5 V | –15% | 0.94 | 15% | |||
| SLEW_RATEx[2:0] = 111, VOUT ≥ 0.5 V | –15% | 0.40.4 | 15% | |||
| Load current measurement time | PFM mode (automatically changing to PWM mode for the measurement) | 50 | µs | |||
| PWM mode | 4 | |||||
(1) Minimum (MIN) and maximum (MAX) limits are specified by design, test, or statistical analysis. Typical (TYP) numbers are not verified, but do represent the most likely normal.
(2) Specified by design without testing. The slew-rate can be limited by the current limit (forward or negative current limit), output capacitance, and load current.
Figure 1. I2C Timing