ZHCSHY8 March 2018 LP87561-Q1 , LP87562-Q1 , LP87563-Q1 , LP87564-Q1 , LP87565-Q1
PRODUCTION DATA.
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Address: 0x1D
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| Reserved | BUCK3_PG
_INT |
BUCK3_SC
_INT |
BUCK3_ILIM
_INT |
Reserved | BUCK2_PG
_INT |
BUCK2_SC
_INT |
BUCK2_ILIM
_INT |
| Bits | Field | Type | Default | Description |
|---|---|---|---|---|
| 7 | Reserved | R/W | 0h | |
| 6 | BUCK3_PG_INT | R/W1C | 0h | Latched status bit indicating that the BUCK3 output voltage reached the power-good-threshold level.
Write this bit to 1h to clear. |
| 5 | BUCK3_SC_INT | R/W1C | 0h | Latched status bit indicating that the BUCK3 output voltage has fallen to less than the 0.35-V level during operation or the BUCK3 output did not reach the 0.35-V level in 1 ms from enable.
Write this bit to 1h to clear. |
| 4 | BUCK3_ILIM_INT | R/W1C | 0h | Latched status bit indicating that the output current limit is active.
Write this bit to 1h to clear. |
| 3 | Reserved | R/W | 0h | |
| 2 | BUCK2_PG_INT | R/W1C | 0h | Latched status bit indicating that the BUCK2 output voltage reached the power-good-threshold level.
Write this bit to 1h to clear. |
| 1 | BUCK2_SC_INT | R/W1C | 0h | Latched status bit indicating that the BUCK2 output voltage has fallen to less than the 0.35-V level during operation or the BUCK2 output did not reach the 0.35-V level in 1 ms from enable.
Write this bit to 1h to clear. |
| 0 | BUCK2_ILIM_INT | R/W1C | 0h | Latched status bit indicating that the output current limit is active.
Write this bit to 1h to clear. |