ZHCSI00D April 2018 – September 2020 LMR36015
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 說明（續）
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
- 8 Specifications
- 9 Detailed Description
-
10Application and Implementation
- 10.1 Application Information
- 10.2
Typical Application
- 10.2.1
Design 1: Low Power 24-V, 1.5-A PFM Converter
- 10.2.1.1 Design Requirements
- 10.2.1.2
Detailed Design Procedure
- 10.2.1.2.1 Custom Design With WEBENCH Tools
- 10.2.1.2.2 Choosing the Switching Frequency
- 10.2.1.2.3 Setting the Output Voltage
- 10.2.1.2.4 Inductor Selection
- 10.2.1.2.5 Output Capacitor Selection
- 10.2.1.2.6 Input Capacitor Selection
- 10.2.1.2.7 CBOOT
- 10.2.1.2.8 VCC
- 10.2.1.2.9 CFF Selection
- 10.2.1.2.10 Maximum Ambient Temperature
- 10.2.2 Application Curves
- 10.2.3 Design 2: High Density 24-V, 1.5-A FPWM Converter
- 10.2.1
Design 1: Low Power 24-V, 1.5-A PFM Converter
- 10.3 What to Do and What Not to Do
- 11Power Supply Recommendations
- 12Layout
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information
9.4.4 Minimum Switch On-Time
Every switching regulator has a minimum controllable on-time dictated by the inherent delays and blanking times associated with the control circuits. This imposes a minimum switch duty cycle and, therefore, a minimum conversion ratio. The constraint is encountered at high input voltages and low output voltages. To help extend the minimum controllable duty cycle, the LMR36015 automatically reduces the switching frequency when the minimum on-time limit is reached. This way, the converter can regulate the lowest programmable output voltage at the maximum input voltage. An estimate for the approximate input voltage, for a given output voltage, before frequency foldback occurs, is found in Equation 2. As the input voltage is increased, the switch on-time (duty cycle) reduces to regulate the output voltage. When the on-time reaches the limit, the switching frequency drops, while the on-time remains fixed.
