ZHCSN09A June 2021 – September 2022 LM5168-Q1 , LM5169-Q1
PRODUCTION DATA
The LM516x-Q1 contains a dual-level EN/UVLO circuit. When the EN/UVLO voltage is below 0.45 V (typical), the converter is in a low-current shutdown mode and the input quiescent current (IQ) is dropped down to 3 μA. When the voltage is greater than 1.1 V but less than 1.5 V (typical), the converter is in standby mode. In standby mode, the internal bias regulator is active while the control circuit is disabled. When the voltage exceeds the rising threshold of 1.5 V (typical), normal operation begins. Install a resistor divider from VIN to GND to set the minimum operating voltage of the regulator. If the user wishes to implement an input voltage UVLO, refer to Figure 8-2, Equation 3, and Equation 4 for details. Typically, the user will choose a value for RUV1 and calculate the value of RUV2 using Equation 3 based on a desired VON. Reasonable values for RUV1 are in the 1-MΩ range. Equation 4 is then used to calculate the resulting VOFF. VON and VOFF are the input voltages where the device will turn on and off, respectively.
If input UVLO is not required, the user can either drive EN/UVLO as an enable input driven by a logic signal or connect it directly to VIN. If EN/UVLO is directly connected to VIN, the regulator begins switching as soon as the internal bias rails are active; about 4.5 V at VIN.