ZHCSKN8A december 2019 – april 2023 LM5163H-Q1
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Control Architecture
- 7.3.2 Internal VCC Regulator and Bootstrap Capacitor
- 7.3.3 Regulation Comparator
- 7.3.4 Internal Soft Start
- 7.3.5 On-Time Generator
- 7.3.6 Current Limit
- 7.3.7 N-Channel Buck Switch and Driver
- 7.3.8 Synchronous Rectifier
- 7.3.9 Enable/Undervoltage Lockout (EN/UVLO)
- 7.3.10 Power Good (PGOOD)
- 7.3.11 Thermal Protection
- 7.4 Device Functional Modes
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Mechanical, Packaging, and Orderable Information
8.2.3 Application Curves
Figure 8-2 Conversion Efficiency (Log Scale)
Figure 8-4 Load
and Line Regulation Performance
| VIN = 24 V | IOUT = 0 A |
| VIN = 24 V | IOUT = 0 A |
| VIN = 24 V | IOUT = 0 A |
| VIN = 24 V | Load = Short to 0 A |
| VIN = 24 V | IOUT = 0 A |
| VIN = 48 V | Load = 0.5 A |
Figure 8-3 Conversion Efficiency (Linear Scale)
| VIN = 24 V | IOUT = 0.125 A to 0.5 A at 0.1 A/μs |
| VIN = 24 V | IOUT = 0.5 A (Resistive) |
| VIN = 24 V | IOUT = 0.5 A (Resistive) |
| VIN = 24 V | Load = 0 A to Short |
| VIN = 24 V | Load = 0 A to Short to 0 A |
| VIN = 24 V | IOUT = 0.5 A |
| VIN = 48 V | Load = 0.5 A |