ZHCSMR4A november 2020 – november 2020 DS90UB662-Q1
PRODUCTION DATA
| BIT | FIELD | TYPE | DEFAULT | DESCRIPTION |
|---|---|---|---|---|
| 7 | INT_EN | R/W | 0 | Global Interrupt Enable: Enables interrupt on the interrupt signal to the controller. |
| 6 | RESERVED | - | 0 | Reserved |
| 5 | Reserved | R/W | 0 | Reserved |
| 4 | IE_CSI_TX | R/W | 0 | CSI-2 Transmit Port Interrupt: Enable interrupt from CSI-2 Transmitter Port. |
| 3 | IE_RX3 | R/W | 0 | RX Port 3 Interrupt: Enable interrupt from Receiver Port 3. |
| 2 | IE_RX2 | R/W | 0 | RX Port 2 Interrupt: Enable interrupt from Receiver Port 2. |
| 1 | IE_RX1 | R/W | 0 | RX Port 1 Interrupt: Enable interrupt from Receiver Port 1. |
| 0 | IE_RX0 | R/W | 0 | RX Port 0 Interrupt: Enable interrupt from Receiver Port 0. |