ZHCSMR4A november 2020 – november 2020 DS90UB662-Q1
PRODUCTION DATA
When the PASS_LINE_SIZE control is set in the PORT_PASS_CTL register, the Receiver will qualify received frames based on having a consistent video line size. For PASS_LINE_SIZE to be clear, the deserializer checks that the received line length remains consistent during the frame and between frames. For each video line, the length (in bytes) will be determined. If it varies then we will flag this condition. Each video line in the packet must be the same size, and the line size must be consistent across video frames. A change in video line size will restart the valid frame counter.
When the PASS_LINE_CNT control is set in the PORT_PASS_CTL register, the Receiver will qualify received frames based on having a consistent frame size in number of lines. A change in number of video lines will restart the valid frame counter.
When the PASS_PARITY_ERR control is set in the PORT_PASS_CTL register, the Receiver will clear the Pass indication on receipt of a parity error on the FPD-Link III interface. The valid frame counter will also be cleared on the parity error event. When PASS_PARITY_ERR is set to 1, TI also recommends that the designer set the PASS_THRESHOLD to 2 or higher to ensure at least one good frame occurs following a parity error.