ZHCSMR4A november 2020 – november 2020 DS90UB662-Q1
PRODUCTION DATA
RX port-specific register. The FPD-Link III Port Select register 0x4C configures which unique Rx port registers can be accessed by I2C read and write commands.
| BIT | FIELD | TYPE | DEFAULT | DESCRIPTION |
|---|---|---|---|---|
| 7:3 | RESERVED | - | 0x0 | Reserved |
| 2 | IS_FPD3_ENC_ERR | R | 0 | FPD-Link III Receiver Encode Error Interrupt Status An encoding error on the FPD-Link III interface for the receive port has been detected. Status is reported in the FPD3_ENC_ERROR bit in the RX_PORT_STS2 register. This interrupt condition is cleared by reading the RX_PORT_STS2 register. |
| 1 | IS_BCC_SEQ_ERR | R | 0 | BCC CRC Sequence Error Interrupt Status A Sequence Error has been detected for the Bi-directional Control Channel forward channel receiver. Status is reported in the BCC_SEQ_ERROR bit in the RX_PORT_STS1 register. This interrupt condition is cleared by reading the RX_PORT_STS1 register. |
| 0 | IS_BCC_CRC_ERR | R | 0 | BCC CRC error detect Interrupt Status A CRC error has been detected on a Bi-directional Control Channel frame received over the FPD-Link III forward channel. Status is reported in the BCC_CRC_ERROR bit in the RX_PORT_STS1 register. This interrupt condition is cleared by reading the RX_PORT_STS1 register. |