ZHCSQQ1B june 2022 – august 2023 ADC32RF54 , ADC32RF55
PRODUCTION DATA
The ADC includes a small internal capture memory buffer which can store up to 64 samples. Once a strobe is given to the memory using SPI register write, the memory will store the next continuous 64 samples of one ADC channel (selected via SPI register write) and stop. The samples are captured from the ADC cores (prior to averaging or decimation). These samples can be read back using the SPI interface without involving the JESD204B interface at all.
This mode allows debug of the analog front end during the initial bring-up phase even if the JESD204B interface is not operational yet.
| ADDR | DATA | DESCRIPTION |
|---|---|---|
| 0x05 | 0x02 | Select DIGITAL page |
| 0x34 | Select ADC channel (D5/D4) and give strobe (D6). The 64 samples are stored in 0x800 to 0x87F in the digital page |