產品詳情

CPU 1 C24 Frequency (MHz) 40 Flash memory (kByte) 32 RAM (kByte) 2 ADC type 10-bit CAN (#) 1 Sigma-delta filter 8 PWM (Ch) 8 Number of ADC channels 8 SPI 1 Operating temperature range (°C) -40 to 125 Rating Catalog Communication interface CAN, SPI, UART Operating system FreeRTOS
CPU 1 C24 Frequency (MHz) 40 Flash memory (kByte) 32 RAM (kByte) 2 ADC type 10-bit CAN (#) 1 Sigma-delta filter 8 PWM (Ch) 8 Number of ADC channels 8 SPI 1 Operating temperature range (°C) -40 to 125 Rating Catalog Communication interface CAN, SPI, UART Operating system FreeRTOS
TQFP (PAG) 64 144 mm2 12 x 12
  • High-Performance Static CMOS Technology
    • 25-ns Instruction Cycle Time (40 MHz)
    • 40-MIPS Performance
    • Low-Power 3.3-V Design
  • Based on TMS320C2xx DSP CPU Core
    • Code-Compatible With F243/F241/C242
    • Instruction Set and Module Compatible With F240
  • Flash (LF) and ROM (LC) Device Options
    • LF240xA: LF2407A, LF2406A, LF2403A, LF2402A
    • LC240xA: LC2406A, LC2404A, LC2403A, LC2402A
  • On-Chip Memory
    • Up to 32K Words x 16 Bits of Flash EEPROM (4 Sectors) or ROM
    • Programmable "Code-Security" Feature for the On-Chip Flash/ROM
    • Up to 2.5K Words x 16 Bits of Data/Program RAM
      • 544 Words of Dual-Access RAM
      • Up to 2K Words of Single-Access RAM
  • Boot ROM (LF240xA Devices)
    • SCI/SPI Bootloader
  • Up to Two Event-Manager (EV) Modules (EVA and EVB), Each Includes:
    • Two 16-Bit General-Purpose Timers
    • Eight 16-Bit Pulse-Width Modulation (PWM) Channels Which Enable:
      • Three-Phase Inverter Control
      • Center- or Edge-Alignment of PWM Channels
      • Emergency PWM Channel Shutdown With External PDPINTx Pin
    • Programmable Deadband (Deadtime) Prevents Shoot-Through Faults
    • Three Capture Units for Time-Stamping of External Events
    • Input Qualifier for Select Pins
    • On-Chip Position Encoder Interface Circuitry
    • Synchronized A-to-D Conversion
    • Designed for AC Induction, BLDC, Switched Reluctance, and Stepper Motor Control
    • Applicable for Multiple Motor and/or Converter Control
  • External Memory Interface (LF2407A)
    • 192K Words x 16 Bits of Total Memory: 64K Program, 64K Data, 64K I/O
  • Watchdog (WD) Timer Module
  • 10-Bit Analog-to-Digital Converter (ADC)
    • 8 or 16 Multiplexed Input Channels
    • 500 ns MIN Conversion Time
    • Selectable Twin 8-State Sequencers Triggered by Two Event Managers
  • Controller Area Network (CAN) 2.0B Module (LF2407A, 2406A, 2403A)
  • Serial Communications Interface (SCI)
  • 16-Bit Serial Peripheral Interface (SPI) (LF2407A, 2406A, LC2404A, 2403A)
  • Phase-Locked-Loop (PLL)-Based Clock Generation
  • Up to 40 Individually Programmable, Multiplexed General-Purpose Input/Output (GPIO) Pins
  • Up to Five External Interrupts (Power Drive Protection, Reset, Two Maskable Interrupts)
  • Power Management:
    • Three Power-Down Modes
    • Ability to Power Down Each Peripheral Independently
  • Real-Time JTAG-Compliant Scan-Based Emulation, IEEE Standard 1149.1 (JTAG)
  • Development Tools Include:
    • Texas Instruments (TI) ANSI C Compiler, Assembler/Linker, and Code Composer Studio?; Debugger
    • Evaluation Modules
    • Scan-Based Self-Emulation (XDS510?;)
    • Broad Third-Party Digital Motor Control Support
  • Package Options
    • 144-Pin LQFP PGE (LF2407A)
    • 100-Pin LQFP PZ (2406A, LC2404A)
    • 64-Pin TQFP PAG (LF2403A, LC2403A, LC2402A)
    • 64-Pin QFP PG (2402A)
  • Extended Temperature Options (A and S)
    • A: –40°C to 85°C
    • S: –40°C to 125°C

Code Composer Studio and XDS510 are trademarks of Texas Instruments.
Other trademarks are the property of their respective owners.
IEEE Standard 1149.1-1990, IEEE Standard Test-Access Port
TMS320C24x, TMS320C2000, TMS320, and C24x are trademarks of Texas Instruments.

  • High-Performance Static CMOS Technology
    • 25-ns Instruction Cycle Time (40 MHz)
    • 40-MIPS Performance
    • Low-Power 3.3-V Design
  • Based on TMS320C2xx DSP CPU Core
    • Code-Compatible With F243/F241/C242
    • Instruction Set and Module Compatible With F240
  • Flash (LF) and ROM (LC) Device Options
    • LF240xA: LF2407A, LF2406A, LF2403A, LF2402A
    • LC240xA: LC2406A, LC2404A, LC2403A, LC2402A
  • On-Chip Memory
    • Up to 32K Words x 16 Bits of Flash EEPROM (4 Sectors) or ROM
    • Programmable "Code-Security" Feature for the On-Chip Flash/ROM
    • Up to 2.5K Words x 16 Bits of Data/Program RAM
      • 544 Words of Dual-Access RAM
      • Up to 2K Words of Single-Access RAM
  • Boot ROM (LF240xA Devices)
    • SCI/SPI Bootloader
  • Up to Two Event-Manager (EV) Modules (EVA and EVB), Each Includes:
    • Two 16-Bit General-Purpose Timers
    • Eight 16-Bit Pulse-Width Modulation (PWM) Channels Which Enable:
      • Three-Phase Inverter Control
      • Center- or Edge-Alignment of PWM Channels
      • Emergency PWM Channel Shutdown With External PDPINTx Pin
    • Programmable Deadband (Deadtime) Prevents Shoot-Through Faults
    • Three Capture Units for Time-Stamping of External Events
    • Input Qualifier for Select Pins
    • On-Chip Position Encoder Interface Circuitry
    • Synchronized A-to-D Conversion
    • Designed for AC Induction, BLDC, Switched Reluctance, and Stepper Motor Control
    • Applicable for Multiple Motor and/or Converter Control
  • External Memory Interface (LF2407A)
    • 192K Words x 16 Bits of Total Memory: 64K Program, 64K Data, 64K I/O
  • Watchdog (WD) Timer Module
  • 10-Bit Analog-to-Digital Converter (ADC)
    • 8 or 16 Multiplexed Input Channels
    • 500 ns MIN Conversion Time
    • Selectable Twin 8-State Sequencers Triggered by Two Event Managers
  • Controller Area Network (CAN) 2.0B Module (LF2407A, 2406A, 2403A)
  • Serial Communications Interface (SCI)
  • 16-Bit Serial Peripheral Interface (SPI) (LF2407A, 2406A, LC2404A, 2403A)
  • Phase-Locked-Loop (PLL)-Based Clock Generation
  • Up to 40 Individually Programmable, Multiplexed General-Purpose Input/Output (GPIO) Pins
  • Up to Five External Interrupts (Power Drive Protection, Reset, Two Maskable Interrupts)
  • Power Management:
    • Three Power-Down Modes
    • Ability to Power Down Each Peripheral Independently
  • Real-Time JTAG-Compliant Scan-Based Emulation, IEEE Standard 1149.1 (JTAG)
  • Development Tools Include:
    • Texas Instruments (TI) ANSI C Compiler, Assembler/Linker, and Code Composer Studio?; Debugger
    • Evaluation Modules
    • Scan-Based Self-Emulation (XDS510?;)
    • Broad Third-Party Digital Motor Control Support
  • Package Options
    • 144-Pin LQFP PGE (LF2407A)
    • 100-Pin LQFP PZ (2406A, LC2404A)
    • 64-Pin TQFP PAG (LF2403A, LC2403A, LC2402A)
    • 64-Pin QFP PG (2402A)
  • Extended Temperature Options (A and S)
    • A: –40°C to 85°C
    • S: –40°C to 125°C

Code Composer Studio and XDS510 are trademarks of Texas Instruments.
Other trademarks are the property of their respective owners.
IEEE Standard 1149.1-1990, IEEE Standard Test-Access Port
TMS320C24x, TMS320C2000, TMS320, and C24x are trademarks of Texas Instruments.

The TMS320LF240xA and TMS320LC240xA devices, new members of the TMS320C24x™; generation of digital signal processor (DSP) controllers, are part of the TMS320C2000™; platform of fixed-point DSPs. The 240xA devices offer the enhanced TMS320™; DSP architectural design of the C2xx core CPU for low-cost, low-power, and high-performance processing capabilities. Several advanced peripherals, optimized for digital motor and motion control applications, have been integrated to provide a true single-chip DSP controller. While code-compatible with the existing C24x™; DSP controller devices, the 240xA offers increased processing performance (40 MIPS) and a higher level of peripheral integration. See the TMS320x240xA Device Summary section for device-specific features.

The 240xA generation offers an array of memory sizes and different peripherals tailored to meet the specific price/performance points required by various applications. Flash devices of up to 32K words offer a cost-effective reprogrammable solution for volume production. The 240xA devices offer a password-based "code security" feature which is useful in preventing unauthorized duplication of proprietary code stored in on-chip Flash/ROM. Note that Flash-based devices contain a 256-word boot ROM to facilitate in-circuit programming. The 240xA family also includes ROM devices that are fully pin-to-pin compatible with their Flash counterparts.

All 240xA devices offer at least one event manager module which has been optimized for digital motor control and power conversion applications. Capabilities of this module include center- and/or edge-aligned PWM generation, programmable deadband to prevent shoot-through faults, and synchronized analog-to-digital conversion. Devices with dual event managers enable multiple motor and/or converter control with a single 240xA DSP controller. Select EV pins have been provided with an "input-qualifier" circuitry, which minimizes inadvertent pin-triggering by glitches.

The high-performance, 10-bit analog-to-digital converter (ADC) has a minimum conversion time of 375 ns and offers up to 16 channels of analog input. The autosequencing capability of the ADC allows a maximum of 16 conversions to take place in a single conversion session without any CPU overhead.

A serial communications interface (SCI) is integrated on all devices to provide asynchronous communication to other devices in the system. For systems requiring additional communication interfaces, the 2407A, 2406A, 2404A, and 2403A offer a 16-bit synchronous serial peripheral interface (SPI). The 2407A, 2406A, and 2403A offer a controller area network (CAN) communications module that meets 2.0B specifications. To maximize device flexibility, functional pins are also configurable as general-purpose inputs/outputs (GPIOs).

To streamline development time, JTAG-compliant scan-based emulation has been integrated into all devices. This provides non-intrusive real-time capabilities required to debug digital control systems. A complete suite of code-generation tools from C compilers to the industry-standard Code Composer Studio™; debugger supports this family. Numerous third-party developers not only offer device-level development tools, but also system-level design and development support.

The TMS320LF240xA and TMS320LC240xA devices, new members of the TMS320C24x™; generation of digital signal processor (DSP) controllers, are part of the TMS320C2000™; platform of fixed-point DSPs. The 240xA devices offer the enhanced TMS320™; DSP architectural design of the C2xx core CPU for low-cost, low-power, and high-performance processing capabilities. Several advanced peripherals, optimized for digital motor and motion control applications, have been integrated to provide a true single-chip DSP controller. While code-compatible with the existing C24x™; DSP controller devices, the 240xA offers increased processing performance (40 MIPS) and a higher level of peripheral integration. See the TMS320x240xA Device Summary section for device-specific features.

The 240xA generation offers an array of memory sizes and different peripherals tailored to meet the specific price/performance points required by various applications. Flash devices of up to 32K words offer a cost-effective reprogrammable solution for volume production. The 240xA devices offer a password-based "code security" feature which is useful in preventing unauthorized duplication of proprietary code stored in on-chip Flash/ROM. Note that Flash-based devices contain a 256-word boot ROM to facilitate in-circuit programming. The 240xA family also includes ROM devices that are fully pin-to-pin compatible with their Flash counterparts.

All 240xA devices offer at least one event manager module which has been optimized for digital motor control and power conversion applications. Capabilities of this module include center- and/or edge-aligned PWM generation, programmable deadband to prevent shoot-through faults, and synchronized analog-to-digital conversion. Devices with dual event managers enable multiple motor and/or converter control with a single 240xA DSP controller. Select EV pins have been provided with an "input-qualifier" circuitry, which minimizes inadvertent pin-triggering by glitches.

The high-performance, 10-bit analog-to-digital converter (ADC) has a minimum conversion time of 375 ns and offers up to 16 channels of analog input. The autosequencing capability of the ADC allows a maximum of 16 conversions to take place in a single conversion session without any CPU overhead.

A serial communications interface (SCI) is integrated on all devices to provide asynchronous communication to other devices in the system. For systems requiring additional communication interfaces, the 2407A, 2406A, 2404A, and 2403A offer a 16-bit synchronous serial peripheral interface (SPI). The 2407A, 2406A, and 2403A offer a controller area network (CAN) communications module that meets 2.0B specifications. To maximize device flexibility, functional pins are also configurable as general-purpose inputs/outputs (GPIOs).

To streamline development time, JTAG-compliant scan-based emulation has been integrated into all devices. This provides non-intrusive real-time capabilities required to debug digital control systems. A complete suite of code-generation tools from C compilers to the industry-standard Code Composer Studio™; debugger supports this family. Numerous third-party developers not only offer device-level development tools, but also system-level design and development support.

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類型 標題 下載最新的英語版本 日期
* 數據表 TMS320LF2407A, LF2406A, LF2403A, LF2402A LC2406A,LC2404A,LC2403A, LC2402A DSP 數據表 (Rev. L) 2007年 9月 26日
* 勘誤表 TMS320LF2407A, LF2406A, LF2403A, LF2402A DSP Controllers Silicon Errata (Rev. E) 2004年 7月 21日
應用手冊 支持 C2000? 的開發工具版本 (Rev. A) PDF | HTML 英語版 (Rev.A) PDF | HTML 2024年 7月 17日
應用手冊 半導體和 IC 封裝熱指標 (Rev. D) PDF | HTML 英語版 (Rev.D) PDF | HTML 2024年 4月 24日
應用手冊 第 2 代 C2000 實時 MCU 的 EEPROM 模擬 (Rev. A) 英語版 (Rev.A) 2021年 8月 3日
應用手冊 C2000? MISRA-C Policy 2017年 9月 26日
用戶指南 C2000 常見問題解答 2015年 5月 26日
應用手冊 Calculating FIT for a Mission Profile 2015年 3月 24日
用戶指南 TMS320x280x, 2801x 增強型局控制器域網 (eCAN) 英語版 2012年 8月 24日
應用手冊 針對 TMS320F28xxx DSC 的閃存編程解決方案 英語版 2012年 7月 30日
應用手冊 Programming External Nonvolatile Memory Using SDFlash for TMS320C28x Devices 2009年 11月 16日
應用手冊 常用對象文件格式 (COFF) 2009年 4月 15日
應用手冊 Migrating from TMS320x2833x/2823x to TMS320x2834x 2009年 3月 3日
用戶指南 TMS320x280x, 2801x, 2804x Serial Peripheral Interface (SPI) Reference Guide 2009年 2月 5日
應用手冊 TMS320F28xx 和 TMS320F28xxx DSC 的硬件設計指南 (Rev. A) 最新英語版本 (Rev.D) 2008年 8月 11日
應用手冊 Microstepping Bipolar Drive of Two-Phase Hybrid Stepping Motor on F2808 DSP 2008年 5月 2日
應用手冊 使用增強型脈寬調制器 (ePWM) 模塊進行 0-100% 占空比控制 2006年 12月 20日
應用手冊 Using the eQEP Module in TMS320x280x as a Dedicated Capture 2006年 11月 30日
用戶指南 TMS320LF/LC240xA DSP Controllers System and Peripherals RG (Rev. C) 2006年 5月 10日
應用手冊 平均電流模式控制功率因素校正轉換器..TMS320LF2407A 最新英語版本 (Rev.A) 2005年 11月 7日
應用手冊 Average Current Mode Controlled Power Factor Correction Converter..TMS320LF2407A (Rev. A) 2005年 7月 19日
應用手冊 Online Stack Overflow Detection on the TMS320C28x DSP 2003年 5月 2日
應用手冊 Programming examples for the TMS320C24x/C240x CAN (Rev. A) 2003年 4月 17日
應用手冊 Getting Started in C and Assembly Code with the TMS320LF240x DSP (Rev. A) 2002年 7月 10日
用戶指南 TMS320F/C24x DSP Controllers CPU & Instr. Set RG-Manual Update Sheet (SPRU160C) (Rev. A) 2002年 7月 1日
用戶指南 TMS320F/C24x DSP Controllers CPU and Instruction Set Reference Guide (Rev. C) 1999年 3月 31日

設計和開發

如需其他信息或資源,請點擊以下任一標題進入詳情頁面查看(如有)。

IDE、配置、編譯器或調試器

SOLUTION_ADAPTER — 適用于 C2000™ MCU 的 powerSUITE 數字電源解決方案適配器工具

The Solution Adapter is one of several tools included in the powerSUITE Digital Power Supply Design Software Tools for C2000? Microcontrollers.  The Solution Adapter allows you to modify existing code examples from TI digital power kits and configure them to run on a custom digital power (...)
軟件編程工具

SPRC074 Download LF240xA Serial Flash Programming Utility

支持的產品和硬件

支持的產品和硬件

產品
C2000 實時微控制器
TMS320LF2401A 16 位 DSP、40MHz 頻率、8kw 閃存、32 引腳 TMS320LF2402A 16 位 DSP、40MHz 頻率、8kw 閃存、64 引腳 TMS320LF2403A 16 位 DSP、40MHz 頻率、16kw 閃存、64 引腳 TMS320LF2406A 16 位 DSP、40MHz 頻率、32kw 閃存、100 引腳 TMS320LF2407A 16 位 DSP、40MHz 頻率、32kw 閃存、144 引腳
支持軟件

SPRC141 TMS320LF240x/LF240A Flash API

支持的產品和硬件

支持的產品和硬件

產品
C2000 實時微控制器
SM320LF2407A-EP 具有 40MIPS 性能的 C2000? 增強型產品 16 位 MCU TMS320LF2401A 16 位 DSP、40MHz 頻率、8kw 閃存、32 引腳 TMS320LF2402A 16 位 DSP、40MHz 頻率、8kw 閃存、64 引腳 TMS320LF2403A 16 位 DSP、40MHz 頻率、16kw 閃存、64 引腳 TMS320LF2406A 16 位 DSP、40MHz 頻率、32kw 閃存、100 引腳 TMS320LF2407A 16 位 DSP、40MHz 頻率、32kw 閃存、144 引腳
設計工具

C2000-3P-SEARCH — 3P search tool

TI 與多家公司攜手推出適用于 TI C2000 器件的各種解決方案和服務。這些公司可使用 C2000 器件加速您的量產流程。下載此搜索工具,快速瀏覽第三方詳細信息,并尋找合適的第三方來滿足您的需求。

該工具分為兩大類 - 應用及閃存編程解決方案和服務。

“應用”類:

  1. 培訓/研討會
  2. 建模工具
  3. 電機控制
  4. 數字電源
  5. 軟件棧
  6. 功能安全
  7. 信息安全
  8. 硬件服務
  9. 軟件服務
封裝 引腳 CAD 符號、封裝和 3D 模型
TQFP (PAG) 64 Ultra Librarian

訂購和質量

包含信息:
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續可靠性監測
包含信息:
  • 制造廠地點
  • 封裝廠地點

支持和培訓

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