SLVAEK9A December 2019 – November 2020 TPS62160-Q1 , TPS62162-Q1
4 Pin Failure Mode Analysis (Pin FMA)
This section provides a Failure Mode Analysis (FMA) for the pins of the TPS62160-Q1 and TPS62162-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to Ground (see Table 4-2 and Table 4-6)
- Pin open-circuited (see Table 4-3 and Table 4-7)
- Pin short-circuited to an adjacent pin (see Table 4-4 and Table 4-8)
- Pin short-circuited to supply (see Table 4-5 and Table 4-9)
The following tables also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality |
| B | No device damage, but loss of functionality |
| C | No device damage, but performance degradation |
| D | No device damage, no impact to functionality or performance |
Figure 4-1 shows the TPS62160-Q1 and TPS62162-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TPS62160-Q1 and TPS62162-Q1 data sheet.
Figure 4-1 Pin Diagram