SCAA124 April 2015 RM41L232 , RM42L432 , RM44L520 , RM44L920 , RM46L430 , RM46L440 , RM46L450 , RM46L830 , RM46L840 , RM46L850 , RM46L852 , RM48L530 , RM48L540 , RM48L730 , RM48L740 , RM48L940 , RM48L950 , RM48L952 , RM57L843 , TMS570LC4357 , TMS570LC4357-EP , TMS570LC4357-SEP , TMS570LS0232 , TMS570LS0332 , TMS570LS0432 , TMS570LS0714 , TMS570LS0714-S , TMS570LS0914 , TMS570LS1114 , TMS570LS1115 , TMS570LS1224 , TMS570LS1225 , TMS570LS1227 , TMS570LS2124 , TMS570LS2125 , TMS570LS2134 , TMS570LS2135 , TMS570LS2135-S , TMS570LS3134 , TMS570LS3135 , TMS570LS3137
Latch-Up today is still a potentially potent source of failure in the qualification flow at manufacturers and in the customer application. As IC’s get smaller, so do the dimensions between transistors within an IC. Transistor spacing can create conditions for Latch-Up. Texas Instruments is influencing the industry to consider more complete methods to stress Latch-Up in all products but in particular, analog products. The goal at Texas Instruments is to continuously improve the quality and reliability of the products.