The primary single-event effect (SEE) event
of interest in the THVD9491-SEP is the destructive single-event latch-up. From a risk or
impact perspective, the occurrence of an SEL is potentially the most destructive SEE
event and the biggest concern for space applications. In mixed technologies such as the
linear BiCMOS (LBC9) process used for THVD9491-SEP, the CMOS circuitry introduces a
potential SEL susceptibility. SEL can occur if excess current injection caused by the
passage of an energetic ion is high enough to trigger the formation of a parasitic
cross-coupled PNP and NPN bipolar structure (formed between the p-substrate and n-well
and n+ and p+ contacts). The parasitic bipolar structure initiated by a single-event
creates a high-conductance path (inducing a steadystate current that is typically
orders-of-magnitude higher than the normal operating current) between power and ground
that persists (is latched) until power is removed or until the device is destroyed by
the high-current state. The process modifications applied for SEL-mitigation were
sufficient, as the THVD9491-SEP exhibited no SEL with heavy-ions up to an
LET
EFF of 47.5MeV × cm
2/mg at a fluence of 1 ×
10
7ions/cm
2 at a chip temperature of 125°C. The THVD9491-SEP
was characterized for SET at a flux of approximately 10
4ions/cm
2 ×
s and a fluence of approximately 10
6ions/cm
2 with a die
temperature of about 25°C. The device was characterized with two different bias schemes
shown below. Under these bias conditions, all recorded VOUT voltage excursions
self-recover with no external intervention.